xref: /OK3568_Linux_fs/kernel/arch/sparc/include/asm/smp_32.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /* smp.h: Sparc specific SMP stuff.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef _SPARC_SMP_H
8*4882a593Smuzhiyun #define _SPARC_SMP_H
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/threads.h>
11*4882a593Smuzhiyun #include <asm/head.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #ifndef __ASSEMBLY__
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <linux/cpumask.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #ifdef CONFIG_SMP
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #ifndef __ASSEMBLY__
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <asm/ptrace.h>
24*4882a593Smuzhiyun #include <asm/asi.h>
25*4882a593Smuzhiyun #include <linux/atomic.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun /*
28*4882a593Smuzhiyun  *	Private routines/data
29*4882a593Smuzhiyun  */
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun extern unsigned char boot_cpu_id;
32*4882a593Smuzhiyun extern volatile unsigned long cpu_callin_map[NR_CPUS];
33*4882a593Smuzhiyun extern cpumask_t smp_commenced_mask;
34*4882a593Smuzhiyun extern struct linux_prom_registers smp_penguin_ctable;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
37*4882a593Smuzhiyun 		       unsigned long, unsigned long);
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun void cpu_panic(void);
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun  *	General functions that each host system must provide.
43*4882a593Smuzhiyun  */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun void sun4m_init_smp(void);
46*4882a593Smuzhiyun void sun4d_init_smp(void);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun void smp_callin(void);
49*4882a593Smuzhiyun void smp_store_cpu_info(int);
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun void smp_resched_interrupt(void);
52*4882a593Smuzhiyun void smp_call_function_single_interrupt(void);
53*4882a593Smuzhiyun void smp_call_function_interrupt(void);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun struct seq_file;
56*4882a593Smuzhiyun void smp_bogo(struct seq_file *);
57*4882a593Smuzhiyun void smp_info(struct seq_file *);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun struct sparc32_ipi_ops {
60*4882a593Smuzhiyun 	void (*cross_call)(smpfunc_t func, cpumask_t mask, unsigned long arg1,
61*4882a593Smuzhiyun 			   unsigned long arg2, unsigned long arg3,
62*4882a593Smuzhiyun 			   unsigned long arg4);
63*4882a593Smuzhiyun 	void (*resched)(int cpu);
64*4882a593Smuzhiyun 	void (*single)(int cpu);
65*4882a593Smuzhiyun 	void (*mask_one)(int cpu);
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun extern const struct sparc32_ipi_ops *sparc32_ipi_ops;
68*4882a593Smuzhiyun 
xc0(smpfunc_t func)69*4882a593Smuzhiyun static inline void xc0(smpfunc_t func)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask, 0, 0, 0, 0);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
xc1(smpfunc_t func,unsigned long arg1)74*4882a593Smuzhiyun static inline void xc1(smpfunc_t func, unsigned long arg1)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, 0, 0, 0);
77*4882a593Smuzhiyun }
xc2(smpfunc_t func,unsigned long arg1,unsigned long arg2)78*4882a593Smuzhiyun static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask, arg1, arg2, 0, 0);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
xc3(smpfunc_t func,unsigned long arg1,unsigned long arg2,unsigned long arg3)83*4882a593Smuzhiyun static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
84*4882a593Smuzhiyun 		       unsigned long arg3)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask,
87*4882a593Smuzhiyun 				    arg1, arg2, arg3, 0);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun 
xc4(smpfunc_t func,unsigned long arg1,unsigned long arg2,unsigned long arg3,unsigned long arg4)90*4882a593Smuzhiyun static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
91*4882a593Smuzhiyun 		       unsigned long arg3, unsigned long arg4)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	sparc32_ipi_ops->cross_call(func, *cpu_online_mask,
94*4882a593Smuzhiyun 				    arg1, arg2, arg3, arg4);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun void arch_send_call_function_single_ipi(int cpu);
98*4882a593Smuzhiyun void arch_send_call_function_ipi_mask(const struct cpumask *mask);
99*4882a593Smuzhiyun 
cpu_logical_map(int cpu)100*4882a593Smuzhiyun static inline int cpu_logical_map(int cpu)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	return cpu;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun int hard_smp_processor_id(void);
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun #define raw_smp_processor_id()		(current_thread_info()->cpu)
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun void smp_setup_cpu_possible_map(void);
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun #endif /* !(__ASSEMBLY__) */
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun /* Sparc specific messages. */
114*4882a593Smuzhiyun #define MSG_CROSS_CALL         0x0005       /* run func on cpus */
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* Empirical PROM processor mailbox constants.  If the per-cpu mailbox
117*4882a593Smuzhiyun  * contains something other than one of these then the ipi is from
118*4882a593Smuzhiyun  * Linux's active_kernel_processor.  This facility exists so that
119*4882a593Smuzhiyun  * the boot monitor can capture all the other cpus when one catches
120*4882a593Smuzhiyun  * a watchdog reset or the user enters the monitor using L1-A keys.
121*4882a593Smuzhiyun  */
122*4882a593Smuzhiyun #define MBOX_STOPCPU          0xFB
123*4882a593Smuzhiyun #define MBOX_IDLECPU          0xFC
124*4882a593Smuzhiyun #define MBOX_IDLECPU2         0xFD
125*4882a593Smuzhiyun #define MBOX_STOPCPU2         0xFE
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun #else /* SMP */
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun #define hard_smp_processor_id()		0
130*4882a593Smuzhiyun #define smp_setup_cpu_possible_map() do { } while (0)
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun #endif /* !(SMP) */
133*4882a593Smuzhiyun #endif /* !(_SPARC_SMP_H) */
134