1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * psr.h: This file holds the macros for masking off various parts of 4*4882a593Smuzhiyun * the processor status register on the Sparc. This is valid 5*4882a593Smuzhiyun * for Version 8. On the V9 this is renamed to the PSTATE 6*4882a593Smuzhiyun * register and its members are accessed as fields like 7*4882a593Smuzhiyun * PSTATE.PRIV for the current CPU privilege level. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #ifndef __LINUX_SPARC_PSR_H 12*4882a593Smuzhiyun #define __LINUX_SPARC_PSR_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <uapi/asm/psr.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 18*4882a593Smuzhiyun /* Get the %psr register. */ get_psr(void)19*4882a593Smuzhiyunstatic inline unsigned int get_psr(void) 20*4882a593Smuzhiyun { 21*4882a593Smuzhiyun unsigned int psr; 22*4882a593Smuzhiyun __asm__ __volatile__( 23*4882a593Smuzhiyun "rd %%psr, %0\n\t" 24*4882a593Smuzhiyun "nop\n\t" 25*4882a593Smuzhiyun "nop\n\t" 26*4882a593Smuzhiyun "nop\n\t" 27*4882a593Smuzhiyun : "=r" (psr) 28*4882a593Smuzhiyun : /* no inputs */ 29*4882a593Smuzhiyun : "memory"); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun return psr; 32*4882a593Smuzhiyun } 33*4882a593Smuzhiyun put_psr(unsigned int new_psr)34*4882a593Smuzhiyunstatic inline void put_psr(unsigned int new_psr) 35*4882a593Smuzhiyun { 36*4882a593Smuzhiyun __asm__ __volatile__( 37*4882a593Smuzhiyun "wr %0, 0x0, %%psr\n\t" 38*4882a593Smuzhiyun "nop\n\t" 39*4882a593Smuzhiyun "nop\n\t" 40*4882a593Smuzhiyun "nop\n\t" 41*4882a593Smuzhiyun : /* no outputs */ 42*4882a593Smuzhiyun : "r" (new_psr) 43*4882a593Smuzhiyun : "memory", "cc"); 44*4882a593Smuzhiyun } 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* Get the %fsr register. Be careful, make sure the floating point 47*4882a593Smuzhiyun * enable bit is set in the %psr when you execute this or you will 48*4882a593Smuzhiyun * incur a trap. 49*4882a593Smuzhiyun */ 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun extern unsigned int fsr_storage; 52*4882a593Smuzhiyun get_fsr(void)53*4882a593Smuzhiyunstatic inline unsigned int get_fsr(void) 54*4882a593Smuzhiyun { 55*4882a593Smuzhiyun unsigned int fsr = 0; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun __asm__ __volatile__( 58*4882a593Smuzhiyun "st %%fsr, %1\n\t" 59*4882a593Smuzhiyun "ld %1, %0\n\t" 60*4882a593Smuzhiyun : "=r" (fsr) 61*4882a593Smuzhiyun : "m" (fsr_storage)); 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun return fsr; 64*4882a593Smuzhiyun } 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #endif /* !(__ASSEMBLY__) */ 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #endif /* !(__LINUX_SPARC_PSR_H) */ 69