1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _SPARC64_PIL_H 3*4882a593Smuzhiyun #define _SPARC64_PIL_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* To avoid some locking problems, we hard allocate certain PILs 6*4882a593Smuzhiyun * for SMP cross call messages that must do a etrap/rtrap. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * A local_irq_disable() does not block the cross call delivery, so 9*4882a593Smuzhiyun * when SMP locking is an issue we reschedule the event into a PIL 10*4882a593Smuzhiyun * interrupt which is blocked by local_irq_disable(). 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * In fact any XCALL which has to etrap/rtrap has a problem because 13*4882a593Smuzhiyun * it is difficult to prevent rtrap from running BH's, and that would 14*4882a593Smuzhiyun * need to be done if the XCALL arrived while %pil==PIL_NORMAL_MAX. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * Finally, in order to handle profiling events even when a 17*4882a593Smuzhiyun * local_irq_disable() is in progress, we only disable up to level 14 18*4882a593Smuzhiyun * interrupts. Profile counter overflow interrupts arrive at level 19*4882a593Smuzhiyun * 15. 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun #define PIL_SMP_CALL_FUNC 1 22*4882a593Smuzhiyun #define PIL_SMP_RECEIVE_SIGNAL 2 23*4882a593Smuzhiyun #define PIL_SMP_CAPTURE 3 24*4882a593Smuzhiyun #define PIL_DEVICE_IRQ 5 25*4882a593Smuzhiyun #define PIL_SMP_CALL_FUNC_SNGL 6 26*4882a593Smuzhiyun #define PIL_DEFERRED_PCR_WORK 7 27*4882a593Smuzhiyun #define PIL_KGDB_CAPTURE 8 28*4882a593Smuzhiyun #define PIL_NORMAL_MAX 14 29*4882a593Smuzhiyun #define PIL_NMI 15 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #endif /* !(_SPARC64_PIL_H) */ 32