1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_SPARC_PERF_EVENT_H 3*4882a593Smuzhiyun #define __ASM_SPARC_PERF_EVENT_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifdef CONFIG_PERF_EVENTS 6*4882a593Smuzhiyun #include <asm/ptrace.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define perf_arch_fetch_caller_regs(regs, ip) \ 9*4882a593Smuzhiyun do { \ 10*4882a593Smuzhiyun unsigned long _pstate, _asi, _pil, _i7, _fp; \ 11*4882a593Smuzhiyun __asm__ __volatile__("rdpr %%pstate, %0\n\t" \ 12*4882a593Smuzhiyun "rd %%asi, %1\n\t" \ 13*4882a593Smuzhiyun "rdpr %%pil, %2\n\t" \ 14*4882a593Smuzhiyun "mov %%i7, %3\n\t" \ 15*4882a593Smuzhiyun "mov %%i6, %4\n\t" \ 16*4882a593Smuzhiyun : "=r" (_pstate), \ 17*4882a593Smuzhiyun "=r" (_asi), \ 18*4882a593Smuzhiyun "=r" (_pil), \ 19*4882a593Smuzhiyun "=r" (_i7), \ 20*4882a593Smuzhiyun "=r" (_fp)); \ 21*4882a593Smuzhiyun (regs)->tstate = (_pstate << 8) | \ 22*4882a593Smuzhiyun (_asi << 24) | (_pil << 20); \ 23*4882a593Smuzhiyun (regs)->tpc = (ip); \ 24*4882a593Smuzhiyun (regs)->tnpc = (regs)->tpc + 4; \ 25*4882a593Smuzhiyun (regs)->u_regs[UREG_I6] = _fp; \ 26*4882a593Smuzhiyun (regs)->u_regs[UREG_I7] = _i7; \ 27*4882a593Smuzhiyun } while (0) 28*4882a593Smuzhiyun #endif 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #endif 31