1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _SPARC64_LSU_H 3*4882a593Smuzhiyun #define _SPARC64_LSU_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/const.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* LSU Control Register */ 8*4882a593Smuzhiyun #define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/ 9*4882a593Smuzhiyun #define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/ 10*4882a593Smuzhiyun #define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/ 11*4882a593Smuzhiyun #define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/ 12*4882a593Smuzhiyun #define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/ 13*4882a593Smuzhiyun #define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/ 14*4882a593Smuzhiyun #define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables. */ 15*4882a593Smuzhiyun #define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable. */ 16*4882a593Smuzhiyun #define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable. */ 17*4882a593Smuzhiyun #define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable. */ 18*4882a593Smuzhiyun #define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #endif /* !(_SPARC64_LSU_H) */ 21