1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_SPARC_EBUS_DMA_H 3*4882a593Smuzhiyun #define __ASM_SPARC_EBUS_DMA_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun struct ebus_dma_info { 6*4882a593Smuzhiyun spinlock_t lock; 7*4882a593Smuzhiyun void __iomem *regs; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun unsigned int flags; 10*4882a593Smuzhiyun #define EBUS_DMA_FLAG_USE_EBDMA_HANDLER 0x00000001 11*4882a593Smuzhiyun #define EBUS_DMA_FLAG_TCI_DISABLE 0x00000002 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* These are only valid is EBUS_DMA_FLAG_USE_EBDMA_HANDLER is 14*4882a593Smuzhiyun * set. 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun void (*callback)(struct ebus_dma_info *p, int event, void *cookie); 17*4882a593Smuzhiyun void *client_cookie; 18*4882a593Smuzhiyun unsigned int irq; 19*4882a593Smuzhiyun #define EBUS_DMA_EVENT_ERROR 1 20*4882a593Smuzhiyun #define EBUS_DMA_EVENT_DMA 2 21*4882a593Smuzhiyun #define EBUS_DMA_EVENT_DEVICE 4 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun unsigned char name[64]; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun int ebus_dma_register(struct ebus_dma_info *p); 27*4882a593Smuzhiyun int ebus_dma_irq_enable(struct ebus_dma_info *p, int on); 28*4882a593Smuzhiyun void ebus_dma_unregister(struct ebus_dma_info *p); 29*4882a593Smuzhiyun int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr, 30*4882a593Smuzhiyun size_t len); 31*4882a593Smuzhiyun void ebus_dma_prepare(struct ebus_dma_info *p, int write); 32*4882a593Smuzhiyun unsigned int ebus_dma_residue(struct ebus_dma_info *p); 33*4882a593Smuzhiyun unsigned int ebus_dma_addr(struct ebus_dma_info *p); 34*4882a593Smuzhiyun void ebus_dma_enable(struct ebus_dma_info *p, int on); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #endif /* __ASM_SPARC_EBUS_DMA_H */ 37