1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _SPARC64_DCU_H 3*4882a593Smuzhiyun #define _SPARC64_DCU_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/const.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* UltraSparc-III Data Cache Unit Control Register */ 8*4882a593Smuzhiyun #define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */ 9*4882a593Smuzhiyun #define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */ 10*4882a593Smuzhiyun #define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */ 11*4882a593Smuzhiyun #define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */ 12*4882a593Smuzhiyun #define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */ 13*4882a593Smuzhiyun #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */ 14*4882a593Smuzhiyun #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */ 15*4882a593Smuzhiyun #define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/ 16*4882a593Smuzhiyun #define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */ 17*4882a593Smuzhiyun #define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */ 18*4882a593Smuzhiyun #define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */ 19*4882a593Smuzhiyun #define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */ 20*4882a593Smuzhiyun #define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/ 21*4882a593Smuzhiyun #define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */ 22*4882a593Smuzhiyun #define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/ 23*4882a593Smuzhiyun #define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */ 24*4882a593Smuzhiyun #define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */ 25*4882a593Smuzhiyun #define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */ 26*4882a593Smuzhiyun #define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #endif /* _SPARC64_DCU_H */ 29