1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * auxio.h: Definitions and code for the Auxiliary I/O registers. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net) 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #ifndef _SPARC64_AUXIO_H 10*4882a593Smuzhiyun #define _SPARC64_AUXIO_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* AUXIO implementations: 13*4882a593Smuzhiyun * sbus-based NCR89C105 "Slavio" 14*4882a593Smuzhiyun * LED/Floppy (AUX1) register 15*4882a593Smuzhiyun * Power (AUX2) register 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * ebus-based auxio on PCIO 18*4882a593Smuzhiyun * LED Auxio Register 19*4882a593Smuzhiyun * Power Auxio Register 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * Register definitions from NCR _NCR89C105 Chip Specification_ 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * SLAVIO AUX1 @ 0x1900000 24*4882a593Smuzhiyun * ------------------------------------------------- 25*4882a593Smuzhiyun * | (R) | (R) | D | (R) | E | M | T | L | 26*4882a593Smuzhiyun * ------------------------------------------------- 27*4882a593Smuzhiyun * (R) - bit 7:6,4 are reserved and should be masked in s/w 28*4882a593Smuzhiyun * D - Floppy Density Sense (1=high density) R/O 29*4882a593Smuzhiyun * E - Link Test Enable, directly reflected on AT&T 7213 LTE pin 30*4882a593Smuzhiyun * M - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin 31*4882a593Smuzhiyun * T - Terminal Count: sends TC pulse to 82077 floppy controller 32*4882a593Smuzhiyun * L - System LED on front panel (0=off, 1=on) 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun #define AUXIO_AUX1_MASK 0xc0 /* Mask bits */ 35*4882a593Smuzhiyun #define AUXIO_AUX1_FDENS 0x20 /* Floppy Density Sense */ 36*4882a593Smuzhiyun #define AUXIO_AUX1_LTE 0x08 /* Link Test Enable */ 37*4882a593Smuzhiyun #define AUXIO_AUX1_MMUX 0x04 /* Monitor/Mouse Mux */ 38*4882a593Smuzhiyun #define AUXIO_AUX1_FTCNT 0x02 /* Terminal Count, */ 39*4882a593Smuzhiyun #define AUXIO_AUX1_LED 0x01 /* System LED */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* SLAVIO AUX2 @ 0x1910000 42*4882a593Smuzhiyun * ------------------------------------------------- 43*4882a593Smuzhiyun * | (R) | (R) | D | (R) | (R) | (R) | C | F | 44*4882a593Smuzhiyun * ------------------------------------------------- 45*4882a593Smuzhiyun * (R) - bits 7:6,4:2 are reserved and should be masked in s/w 46*4882a593Smuzhiyun * D - Power Failure Detect (1=power fail) 47*4882a593Smuzhiyun * C - Clear Power Failure Detect Int (1=clear) 48*4882a593Smuzhiyun * F - Power Off (1=power off) 49*4882a593Smuzhiyun */ 50*4882a593Smuzhiyun #define AUXIO_AUX2_MASK 0xdc /* Mask Bits */ 51*4882a593Smuzhiyun #define AUXIO_AUX2_PFAILDET 0x20 /* Power Fail Detect */ 52*4882a593Smuzhiyun #define AUXIO_AUX2_PFAILCLR 0x02 /* Clear Pwr Fail Det Intr */ 53*4882a593Smuzhiyun #define AUXIO_AUX2_PWR_OFF 0x01 /* Power Off */ 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837 56*4882a593Smuzhiyun * 57*4882a593Smuzhiyun * PCIO LED Auxio @ 0x726000 58*4882a593Smuzhiyun * ------------------------------------------------- 59*4882a593Smuzhiyun * | 31:1 Unused | LED | 60*4882a593Smuzhiyun * ------------------------------------------------- 61*4882a593Smuzhiyun * Bits 31:1 unused 62*4882a593Smuzhiyun * LED - System LED on front panel (0=off, 1=on) 63*4882a593Smuzhiyun */ 64*4882a593Smuzhiyun #define AUXIO_PCIO_LED 0x01 /* System LED */ 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* PCIO Power Auxio @ 0x724000 67*4882a593Smuzhiyun * ------------------------------------------------- 68*4882a593Smuzhiyun * | 31:2 Unused | CPO | SPO | 69*4882a593Smuzhiyun * ------------------------------------------------- 70*4882a593Smuzhiyun * Bits 31:2 unused 71*4882a593Smuzhiyun * CPO - Courtesy Power Off (1=off) 72*4882a593Smuzhiyun * SPO - System Power Off (1=off) 73*4882a593Smuzhiyun */ 74*4882a593Smuzhiyun #define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off */ 75*4882a593Smuzhiyun #define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off */ 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define AUXIO_LTE_ON 1 80*4882a593Smuzhiyun #define AUXIO_LTE_OFF 0 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* auxio_set_lte - Set Link Test Enable (TPE Link Detect) 83*4882a593Smuzhiyun * 84*4882a593Smuzhiyun * on - AUXIO_LTE_ON or AUXIO_LTE_OFF 85*4882a593Smuzhiyun */ 86*4882a593Smuzhiyun void auxio_set_lte(int on); 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define AUXIO_LED_ON 1 89*4882a593Smuzhiyun #define AUXIO_LED_OFF 0 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* auxio_set_led - Set system front panel LED 92*4882a593Smuzhiyun * 93*4882a593Smuzhiyun * on - AUXIO_LED_ON or AUXIO_LED_OFF 94*4882a593Smuzhiyun */ 95*4882a593Smuzhiyun void auxio_set_led(int on); 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #endif /* ifndef __ASSEMBLY__ */ 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #endif /* !(_SPARC64_AUXIO_H) */ 100