1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * arch/sh/mm/cache-shx3.c - SH-X3 optimized cache ops 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2010 Paul Mundt 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 7*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 8*4882a593Smuzhiyun * for more details. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #include <linux/init.h> 11*4882a593Smuzhiyun #include <linux/kernel.h> 12*4882a593Smuzhiyun #include <linux/io.h> 13*4882a593Smuzhiyun #include <asm/cache.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define CCR_CACHE_SNM 0x40000 /* Hardware-assisted synonym avoidance */ 16*4882a593Smuzhiyun #define CCR_CACHE_IBE 0x1000000 /* ICBI broadcast */ 17*4882a593Smuzhiyun shx3_cache_init(void)18*4882a593Smuzhiyunvoid __init shx3_cache_init(void) 19*4882a593Smuzhiyun { 20*4882a593Smuzhiyun unsigned int ccr; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun ccr = __raw_readl(SH_CCR); 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * If we've got cache aliases, resolve them in hardware. 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun if (boot_cpu_data.dcache.n_aliases || boot_cpu_data.icache.n_aliases) { 28*4882a593Smuzhiyun ccr |= CCR_CACHE_SNM; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun boot_cpu_data.icache.n_aliases = 0; 31*4882a593Smuzhiyun boot_cpu_data.dcache.n_aliases = 0; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun pr_info("Enabling hardware synonym avoidance\n"); 34*4882a593Smuzhiyun } 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #ifdef CONFIG_SMP 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * Broadcast I-cache block invalidations by default. 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun ccr |= CCR_CACHE_IBE; 41*4882a593Smuzhiyun #endif 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun writel_uncached(ccr, SH_CCR); 44*4882a593Smuzhiyun } 45