xref: /OK3568_Linux_fs/kernel/arch/sh/mm/cache-sh2a.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * arch/sh/mm/cache-sh2a.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2008 Yoshinori Sato
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/mm.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <asm/cache.h>
12*4882a593Smuzhiyun #include <asm/addrspace.h>
13*4882a593Smuzhiyun #include <asm/processor.h>
14*4882a593Smuzhiyun #include <asm/cacheflush.h>
15*4882a593Smuzhiyun #include <asm/io.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun  * The maximum number of pages we support up to when doing ranged dcache
19*4882a593Smuzhiyun  * flushing. Anything exceeding this will simply flush the dcache in its
20*4882a593Smuzhiyun  * entirety.
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun #define MAX_OCACHE_PAGES	32
23*4882a593Smuzhiyun #define MAX_ICACHE_PAGES	32
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #ifdef CONFIG_CACHE_WRITEBACK
sh2a_flush_oc_line(unsigned long v,int way)26*4882a593Smuzhiyun static void sh2a_flush_oc_line(unsigned long v, int way)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	unsigned long addr = (v & 0x000007f0) | (way << 11);
29*4882a593Smuzhiyun 	unsigned long data;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	data = __raw_readl(CACHE_OC_ADDRESS_ARRAY | addr);
32*4882a593Smuzhiyun 	if ((data & CACHE_PHYSADDR_MASK) == (v & CACHE_PHYSADDR_MASK)) {
33*4882a593Smuzhiyun 		data &= ~SH_CACHE_UPDATED;
34*4882a593Smuzhiyun 		__raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr);
35*4882a593Smuzhiyun 	}
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun #endif
38*4882a593Smuzhiyun 
sh2a_invalidate_line(unsigned long cache_addr,unsigned long v)39*4882a593Smuzhiyun static void sh2a_invalidate_line(unsigned long cache_addr, unsigned long v)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	/* Set associative bit to hit all ways */
42*4882a593Smuzhiyun 	unsigned long addr = (v & 0x000007f0) | SH_CACHE_ASSOC;
43*4882a593Smuzhiyun 	__raw_writel((addr & CACHE_PHYSADDR_MASK), cache_addr | addr);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /*
47*4882a593Smuzhiyun  * Write back the dirty D-caches, but not invalidate them.
48*4882a593Smuzhiyun  */
sh2a__flush_wback_region(void * start,int size)49*4882a593Smuzhiyun static void sh2a__flush_wback_region(void *start, int size)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun #ifdef CONFIG_CACHE_WRITEBACK
52*4882a593Smuzhiyun 	unsigned long v;
53*4882a593Smuzhiyun 	unsigned long begin, end;
54*4882a593Smuzhiyun 	unsigned long flags;
55*4882a593Smuzhiyun 	int nr_ways;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
58*4882a593Smuzhiyun 	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
59*4882a593Smuzhiyun 		& ~(L1_CACHE_BYTES-1);
60*4882a593Smuzhiyun 	nr_ways = current_cpu_data.dcache.ways;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	local_irq_save(flags);
63*4882a593Smuzhiyun 	jump_to_uncached();
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	/* If there are too many pages then flush the entire cache */
66*4882a593Smuzhiyun 	if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) {
67*4882a593Smuzhiyun 		begin = CACHE_OC_ADDRESS_ARRAY;
68*4882a593Smuzhiyun 		end = begin + (nr_ways * current_cpu_data.dcache.way_size);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 		for (v = begin; v < end; v += L1_CACHE_BYTES) {
71*4882a593Smuzhiyun 			unsigned long data = __raw_readl(v);
72*4882a593Smuzhiyun 			if (data & SH_CACHE_UPDATED)
73*4882a593Smuzhiyun 				__raw_writel(data & ~SH_CACHE_UPDATED, v);
74*4882a593Smuzhiyun 		}
75*4882a593Smuzhiyun 	} else {
76*4882a593Smuzhiyun 		int way;
77*4882a593Smuzhiyun 		for (way = 0; way < nr_ways; way++) {
78*4882a593Smuzhiyun 			for (v = begin; v < end; v += L1_CACHE_BYTES)
79*4882a593Smuzhiyun 				sh2a_flush_oc_line(v, way);
80*4882a593Smuzhiyun 		}
81*4882a593Smuzhiyun 	}
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	back_to_cached();
84*4882a593Smuzhiyun 	local_irq_restore(flags);
85*4882a593Smuzhiyun #endif
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /*
89*4882a593Smuzhiyun  * Write back the dirty D-caches and invalidate them.
90*4882a593Smuzhiyun  */
sh2a__flush_purge_region(void * start,int size)91*4882a593Smuzhiyun static void sh2a__flush_purge_region(void *start, int size)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	unsigned long v;
94*4882a593Smuzhiyun 	unsigned long begin, end;
95*4882a593Smuzhiyun 	unsigned long flags;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
98*4882a593Smuzhiyun 	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
99*4882a593Smuzhiyun 		& ~(L1_CACHE_BYTES-1);
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	local_irq_save(flags);
102*4882a593Smuzhiyun 	jump_to_uncached();
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	for (v = begin; v < end; v+=L1_CACHE_BYTES) {
105*4882a593Smuzhiyun #ifdef CONFIG_CACHE_WRITEBACK
106*4882a593Smuzhiyun 		int way;
107*4882a593Smuzhiyun 		int nr_ways = current_cpu_data.dcache.ways;
108*4882a593Smuzhiyun 		for (way = 0; way < nr_ways; way++)
109*4882a593Smuzhiyun 			sh2a_flush_oc_line(v, way);
110*4882a593Smuzhiyun #endif
111*4882a593Smuzhiyun 		sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v);
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	back_to_cached();
115*4882a593Smuzhiyun 	local_irq_restore(flags);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /*
119*4882a593Smuzhiyun  * Invalidate the D-caches, but no write back please
120*4882a593Smuzhiyun  */
sh2a__flush_invalidate_region(void * start,int size)121*4882a593Smuzhiyun static void sh2a__flush_invalidate_region(void *start, int size)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	unsigned long v;
124*4882a593Smuzhiyun 	unsigned long begin, end;
125*4882a593Smuzhiyun 	unsigned long flags;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
128*4882a593Smuzhiyun 	end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
129*4882a593Smuzhiyun 		& ~(L1_CACHE_BYTES-1);
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	local_irq_save(flags);
132*4882a593Smuzhiyun 	jump_to_uncached();
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	/* If there are too many pages then just blow the cache */
135*4882a593Smuzhiyun 	if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) {
136*4882a593Smuzhiyun 		__raw_writel(__raw_readl(SH_CCR) | CCR_OCACHE_INVALIDATE,
137*4882a593Smuzhiyun 			     SH_CCR);
138*4882a593Smuzhiyun 	} else {
139*4882a593Smuzhiyun 		for (v = begin; v < end; v += L1_CACHE_BYTES)
140*4882a593Smuzhiyun 			sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v);
141*4882a593Smuzhiyun 	}
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	back_to_cached();
144*4882a593Smuzhiyun 	local_irq_restore(flags);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun /*
148*4882a593Smuzhiyun  * Write back the range of D-cache, and purge the I-cache.
149*4882a593Smuzhiyun  */
sh2a_flush_icache_range(void * args)150*4882a593Smuzhiyun static void sh2a_flush_icache_range(void *args)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	struct flusher_data *data = args;
153*4882a593Smuzhiyun 	unsigned long start, end;
154*4882a593Smuzhiyun 	unsigned long v;
155*4882a593Smuzhiyun 	unsigned long flags;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	start = data->addr1 & ~(L1_CACHE_BYTES-1);
158*4882a593Smuzhiyun 	end = (data->addr2 + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun #ifdef CONFIG_CACHE_WRITEBACK
161*4882a593Smuzhiyun 	sh2a__flush_wback_region((void *)start, end-start);
162*4882a593Smuzhiyun #endif
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	local_irq_save(flags);
165*4882a593Smuzhiyun 	jump_to_uncached();
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	/* I-Cache invalidate */
168*4882a593Smuzhiyun 	/* If there are too many pages then just blow the cache */
169*4882a593Smuzhiyun 	if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) {
170*4882a593Smuzhiyun 		__raw_writel(__raw_readl(SH_CCR) | CCR_ICACHE_INVALIDATE,
171*4882a593Smuzhiyun 			     SH_CCR);
172*4882a593Smuzhiyun 	} else {
173*4882a593Smuzhiyun 		for (v = start; v < end; v += L1_CACHE_BYTES)
174*4882a593Smuzhiyun 			sh2a_invalidate_line(CACHE_IC_ADDRESS_ARRAY, v);
175*4882a593Smuzhiyun 	}
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	back_to_cached();
178*4882a593Smuzhiyun 	local_irq_restore(flags);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun 
sh2a_cache_init(void)181*4882a593Smuzhiyun void __init sh2a_cache_init(void)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	local_flush_icache_range	= sh2a_flush_icache_range;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	__flush_wback_region		= sh2a__flush_wback_region;
186*4882a593Smuzhiyun 	__flush_purge_region		= sh2a__flush_purge_region;
187*4882a593Smuzhiyun 	__flush_invalidate_region	= sh2a__flush_invalidate_region;
188*4882a593Smuzhiyun }
189