1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * linux/include/asm-sh/microdev.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Definitions for the SuperH SH4-202 MicroDev board. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #ifndef __ASM_SH_MICRODEV_H 10*4882a593Smuzhiyun #define __ASM_SH_MICRODEV_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun extern void init_microdev_irq(void); 13*4882a593Smuzhiyun extern void microdev_print_fpga_intc_status(void); 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * The following are useful macros for manipulating the interrupt 17*4882a593Smuzhiyun * controller (INTC) on the CPU-board FPGA. should be noted that there 18*4882a593Smuzhiyun * is an INTC on the FPGA, and a separate INTC on the SH4-202 core - 19*4882a593Smuzhiyun * these are two different things, both of which need to be prorammed to 20*4882a593Smuzhiyun * correctly route - unfortunately, they have the same name and 21*4882a593Smuzhiyun * abbreviations! 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun #define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */ 24*4882a593Smuzhiyun #define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */ 25*4882a593Smuzhiyun #define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */ 26*4882a593Smuzhiyun #define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */ 27*4882a593Smuzhiyun #define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */ 28*4882a593Smuzhiyun #define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ 29*4882a593Smuzhiyun #define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */ 30*4882a593Smuzhiyun #define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */ 31*4882a593Smuzhiyun #define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* 35*4882a593Smuzhiyun * The following are the IRQ numbers for the Linux Kernel for external 36*4882a593Smuzhiyun * interrupts. i.e. the numbers seen by 'cat /proc/interrupt'. 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun #define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ 39*4882a593Smuzhiyun #define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */ 40*4882a593Smuzhiyun #define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */ 41*4882a593Smuzhiyun #define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ 42*4882a593Smuzhiyun #define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */ 43*4882a593Smuzhiyun #define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ 44*4882a593Smuzhiyun #define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */ 45*4882a593Smuzhiyun #define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */ 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* 48*4882a593Smuzhiyun * The following are the IRQ numbers for the INTC on the FPGA for 49*4882a593Smuzhiyun * external interrupts. i.e. the bits in the INTC registers in the 50*4882a593Smuzhiyun * FPGA. 51*4882a593Smuzhiyun */ 52*4882a593Smuzhiyun #define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ 53*4882a593Smuzhiyun #define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */ 54*4882a593Smuzhiyun #define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ 55*4882a593Smuzhiyun #define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ 56*4882a593Smuzhiyun #define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */ 57*4882a593Smuzhiyun #define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */ 58*4882a593Smuzhiyun #define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */ 59*4882a593Smuzhiyun #define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */ 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #define MICRODEV_IRQ_PCI_INTA 8 62*4882a593Smuzhiyun #define MICRODEV_IRQ_PCI_INTB 9 63*4882a593Smuzhiyun #define MICRODEV_IRQ_PCI_INTC 10 64*4882a593Smuzhiyun #define MICRODEV_IRQ_PCI_INTD 11 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define __IO_PREFIX microdev 67*4882a593Smuzhiyun #include <asm/io_generic.h> 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #endif /* __ASM_SH_MICRODEV_H */ 70