1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_CPU_SH3_DAC_H 3*4882a593Smuzhiyun #define __ASM_CPU_SH3_DAC_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* 6*4882a593Smuzhiyun * Copyright (C) 2003 Andriy Skulysh 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define DADR0 0xa40000a0 11*4882a593Smuzhiyun #define DADR1 0xa40000a2 12*4882a593Smuzhiyun #define DACR 0xa40000a4 13*4882a593Smuzhiyun #define DACR_DAOE1 0x80 14*4882a593Smuzhiyun #define DACR_DAOE0 0x40 15*4882a593Smuzhiyun #define DACR_DAE 0x20 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun sh_dac_enable(int channel)18*4882a593Smuzhiyunstatic __inline__ void sh_dac_enable(int channel) 19*4882a593Smuzhiyun { 20*4882a593Smuzhiyun unsigned char v; 21*4882a593Smuzhiyun v = __raw_readb(DACR); 22*4882a593Smuzhiyun if(channel) v |= DACR_DAOE1; 23*4882a593Smuzhiyun else v |= DACR_DAOE0; 24*4882a593Smuzhiyun __raw_writeb(v,DACR); 25*4882a593Smuzhiyun } 26*4882a593Smuzhiyun sh_dac_disable(int channel)27*4882a593Smuzhiyunstatic __inline__ void sh_dac_disable(int channel) 28*4882a593Smuzhiyun { 29*4882a593Smuzhiyun unsigned char v; 30*4882a593Smuzhiyun v = __raw_readb(DACR); 31*4882a593Smuzhiyun if(channel) v &= ~DACR_DAOE1; 32*4882a593Smuzhiyun else v &= ~DACR_DAOE0; 33*4882a593Smuzhiyun __raw_writeb(v,DACR); 34*4882a593Smuzhiyun } 35*4882a593Smuzhiyun sh_dac_output(u8 value,int channel)36*4882a593Smuzhiyunstatic __inline__ void sh_dac_output(u8 value, int channel) 37*4882a593Smuzhiyun { 38*4882a593Smuzhiyun if(channel) __raw_writeb(value,DADR1); 39*4882a593Smuzhiyun else __raw_writeb(value,DADR0); 40*4882a593Smuzhiyun } 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #endif /* __ASM_CPU_SH3_DAC_H */ 43