1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_SH_SWITCH_TO_32_H 3*4882a593Smuzhiyun #define __ASM_SH_SWITCH_TO_32_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifdef CONFIG_SH_DSP 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define is_dsp_enabled(tsk) \ 8*4882a593Smuzhiyun (!!(tsk->thread.dsp_status.status & SR_DSP)) 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define __restore_dsp(tsk) \ 11*4882a593Smuzhiyun do { \ 12*4882a593Smuzhiyun register u32 *__ts2 __asm__ ("r2") = \ 13*4882a593Smuzhiyun (u32 *)&tsk->thread.dsp_status; \ 14*4882a593Smuzhiyun __asm__ __volatile__ ( \ 15*4882a593Smuzhiyun ".balign 4\n\t" \ 16*4882a593Smuzhiyun "movs.l @r2+, a0\n\t" \ 17*4882a593Smuzhiyun "movs.l @r2+, a1\n\t" \ 18*4882a593Smuzhiyun "movs.l @r2+, a0g\n\t" \ 19*4882a593Smuzhiyun "movs.l @r2+, a1g\n\t" \ 20*4882a593Smuzhiyun "movs.l @r2+, m0\n\t" \ 21*4882a593Smuzhiyun "movs.l @r2+, m1\n\t" \ 22*4882a593Smuzhiyun "movs.l @r2+, x0\n\t" \ 23*4882a593Smuzhiyun "movs.l @r2+, x1\n\t" \ 24*4882a593Smuzhiyun "movs.l @r2+, y0\n\t" \ 25*4882a593Smuzhiyun "movs.l @r2+, y1\n\t" \ 26*4882a593Smuzhiyun "lds.l @r2+, dsr\n\t" \ 27*4882a593Smuzhiyun "ldc.l @r2+, rs\n\t" \ 28*4882a593Smuzhiyun "ldc.l @r2+, re\n\t" \ 29*4882a593Smuzhiyun "ldc.l @r2+, mod\n\t" \ 30*4882a593Smuzhiyun : : "r" (__ts2)); \ 31*4882a593Smuzhiyun } while (0) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define __save_dsp(tsk) \ 34*4882a593Smuzhiyun do { \ 35*4882a593Smuzhiyun register u32 *__ts2 __asm__ ("r2") = \ 36*4882a593Smuzhiyun (u32 *)&tsk->thread.dsp_status + 14; \ 37*4882a593Smuzhiyun \ 38*4882a593Smuzhiyun __asm__ __volatile__ ( \ 39*4882a593Smuzhiyun ".balign 4\n\t" \ 40*4882a593Smuzhiyun "stc.l mod, @-r2\n\t" \ 41*4882a593Smuzhiyun "stc.l re, @-r2\n\t" \ 42*4882a593Smuzhiyun "stc.l rs, @-r2\n\t" \ 43*4882a593Smuzhiyun "sts.l dsr, @-r2\n\t" \ 44*4882a593Smuzhiyun "movs.l y1, @-r2\n\t" \ 45*4882a593Smuzhiyun "movs.l y0, @-r2\n\t" \ 46*4882a593Smuzhiyun "movs.l x1, @-r2\n\t" \ 47*4882a593Smuzhiyun "movs.l x0, @-r2\n\t" \ 48*4882a593Smuzhiyun "movs.l m1, @-r2\n\t" \ 49*4882a593Smuzhiyun "movs.l m0, @-r2\n\t" \ 50*4882a593Smuzhiyun "movs.l a1g, @-r2\n\t" \ 51*4882a593Smuzhiyun "movs.l a0g, @-r2\n\t" \ 52*4882a593Smuzhiyun "movs.l a1, @-r2\n\t" \ 53*4882a593Smuzhiyun "movs.l a0, @-r2\n\t" \ 54*4882a593Smuzhiyun : : "r" (__ts2)); \ 55*4882a593Smuzhiyun } while (0) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #else 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define is_dsp_enabled(tsk) (0) 60*4882a593Smuzhiyun #define __save_dsp(tsk) do { } while (0) 61*4882a593Smuzhiyun #define __restore_dsp(tsk) do { } while (0) 62*4882a593Smuzhiyun #endif 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun struct task_struct *__switch_to(struct task_struct *prev, 65*4882a593Smuzhiyun struct task_struct *next); 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /* 68*4882a593Smuzhiyun * switch_to() should switch tasks to task nr n, first 69*4882a593Smuzhiyun */ 70*4882a593Smuzhiyun #define switch_to(prev, next, last) \ 71*4882a593Smuzhiyun do { \ 72*4882a593Smuzhiyun register u32 *__ts1 __asm__ ("r1"); \ 73*4882a593Smuzhiyun register u32 *__ts2 __asm__ ("r2"); \ 74*4882a593Smuzhiyun register u32 *__ts4 __asm__ ("r4"); \ 75*4882a593Smuzhiyun register u32 *__ts5 __asm__ ("r5"); \ 76*4882a593Smuzhiyun register u32 *__ts6 __asm__ ("r6"); \ 77*4882a593Smuzhiyun register u32 __ts7 __asm__ ("r7"); \ 78*4882a593Smuzhiyun struct task_struct *__last; \ 79*4882a593Smuzhiyun \ 80*4882a593Smuzhiyun if (is_dsp_enabled(prev)) \ 81*4882a593Smuzhiyun __save_dsp(prev); \ 82*4882a593Smuzhiyun if (is_dsp_enabled(next)) \ 83*4882a593Smuzhiyun __restore_dsp(next); \ 84*4882a593Smuzhiyun \ 85*4882a593Smuzhiyun __ts1 = (u32 *)&prev->thread.sp; \ 86*4882a593Smuzhiyun __ts2 = (u32 *)&prev->thread.pc; \ 87*4882a593Smuzhiyun __ts4 = (u32 *)prev; \ 88*4882a593Smuzhiyun __ts5 = (u32 *)next; \ 89*4882a593Smuzhiyun __ts6 = (u32 *)&next->thread.sp; \ 90*4882a593Smuzhiyun __ts7 = next->thread.pc; \ 91*4882a593Smuzhiyun \ 92*4882a593Smuzhiyun __asm__ __volatile__ ( \ 93*4882a593Smuzhiyun ".balign 4\n\t" \ 94*4882a593Smuzhiyun "stc.l gbr, @-r15\n\t" \ 95*4882a593Smuzhiyun "sts.l pr, @-r15\n\t" \ 96*4882a593Smuzhiyun "mov.l r8, @-r15\n\t" \ 97*4882a593Smuzhiyun "mov.l r9, @-r15\n\t" \ 98*4882a593Smuzhiyun "mov.l r10, @-r15\n\t" \ 99*4882a593Smuzhiyun "mov.l r11, @-r15\n\t" \ 100*4882a593Smuzhiyun "mov.l r12, @-r15\n\t" \ 101*4882a593Smuzhiyun "mov.l r13, @-r15\n\t" \ 102*4882a593Smuzhiyun "mov.l r14, @-r15\n\t" \ 103*4882a593Smuzhiyun "mov.l r15, @r1\t! save SP\n\t" \ 104*4882a593Smuzhiyun "mov.l @r6, r15\t! change to new stack\n\t" \ 105*4882a593Smuzhiyun "mova 1f, %0\n\t" \ 106*4882a593Smuzhiyun "mov.l %0, @r2\t! save PC\n\t" \ 107*4882a593Smuzhiyun "mov.l 2f, %0\n\t" \ 108*4882a593Smuzhiyun "jmp @%0\t! call __switch_to\n\t" \ 109*4882a593Smuzhiyun " lds r7, pr\t! with return to new PC\n\t" \ 110*4882a593Smuzhiyun ".balign 4\n" \ 111*4882a593Smuzhiyun "2:\n\t" \ 112*4882a593Smuzhiyun ".long __switch_to\n" \ 113*4882a593Smuzhiyun "1:\n\t" \ 114*4882a593Smuzhiyun "mov.l @r15+, r14\n\t" \ 115*4882a593Smuzhiyun "mov.l @r15+, r13\n\t" \ 116*4882a593Smuzhiyun "mov.l @r15+, r12\n\t" \ 117*4882a593Smuzhiyun "mov.l @r15+, r11\n\t" \ 118*4882a593Smuzhiyun "mov.l @r15+, r10\n\t" \ 119*4882a593Smuzhiyun "mov.l @r15+, r9\n\t" \ 120*4882a593Smuzhiyun "mov.l @r15+, r8\n\t" \ 121*4882a593Smuzhiyun "lds.l @r15+, pr\n\t" \ 122*4882a593Smuzhiyun "ldc.l @r15+, gbr\n\t" \ 123*4882a593Smuzhiyun : "=z" (__last) \ 124*4882a593Smuzhiyun : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ 125*4882a593Smuzhiyun "r" (__ts5), "r" (__ts6), "r" (__ts7) \ 126*4882a593Smuzhiyun : "r3", "t"); \ 127*4882a593Smuzhiyun \ 128*4882a593Smuzhiyun last = __last; \ 129*4882a593Smuzhiyun } while (0) 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #endif /* __ASM_SH_SWITCH_TO_32_H */ 132