xref: /OK3568_Linux_fs/kernel/arch/sh/include/asm/pgtable.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * This file contains the functions and defines necessary to modify and
4*4882a593Smuzhiyun  * use the SuperH page table tree.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 1999 Niibe Yutaka
7*4882a593Smuzhiyun  * Copyright (C) 2002 - 2007 Paul Mundt
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun #ifndef __ASM_SH_PGTABLE_H
10*4882a593Smuzhiyun #define __ASM_SH_PGTABLE_H
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #ifdef CONFIG_X2TLB
13*4882a593Smuzhiyun #include <asm/pgtable-3level.h>
14*4882a593Smuzhiyun #else
15*4882a593Smuzhiyun #include <asm/pgtable-2level.h>
16*4882a593Smuzhiyun #endif
17*4882a593Smuzhiyun #include <asm/page.h>
18*4882a593Smuzhiyun #include <asm/mmu.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #ifndef __ASSEMBLY__
21*4882a593Smuzhiyun #include <asm/addrspace.h>
22*4882a593Smuzhiyun #include <asm/fixmap.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun  * ZERO_PAGE is a global shared page that is always zero: used
26*4882a593Smuzhiyun  * for zero-mapped memory areas etc..
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
29*4882a593Smuzhiyun #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #endif /* !__ASSEMBLY__ */
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun /*
34*4882a593Smuzhiyun  * Effective and physical address definitions, to aid with sign
35*4882a593Smuzhiyun  * extension.
36*4882a593Smuzhiyun  */
37*4882a593Smuzhiyun #define NEFF		32
38*4882a593Smuzhiyun #define	NEFF_SIGN	(1LL << (NEFF - 1))
39*4882a593Smuzhiyun #define	NEFF_MASK	(-1LL << NEFF)
40*4882a593Smuzhiyun 
neff_sign_extend(unsigned long val)41*4882a593Smuzhiyun static inline unsigned long long neff_sign_extend(unsigned long val)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	unsigned long long extended = val;
44*4882a593Smuzhiyun 	return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #ifdef CONFIG_29BIT
48*4882a593Smuzhiyun #define NPHYS		29
49*4882a593Smuzhiyun #else
50*4882a593Smuzhiyun #define NPHYS		32
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define	NPHYS_SIGN	(1LL << (NPHYS - 1))
54*4882a593Smuzhiyun #define	NPHYS_MASK	(-1LL << NPHYS)
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
57*4882a593Smuzhiyun #define PGDIR_MASK	(~(PGDIR_SIZE-1))
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* Entries per level */
60*4882a593Smuzhiyun #define PTRS_PER_PTE	(PAGE_SIZE / (1 << PTE_MAGNITUDE))
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun #define FIRST_USER_ADDRESS	0UL
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun #define PHYS_ADDR_MASK29		0x1fffffff
65*4882a593Smuzhiyun #define PHYS_ADDR_MASK32		0xffffffff
66*4882a593Smuzhiyun 
phys_addr_mask(void)67*4882a593Smuzhiyun static inline unsigned long phys_addr_mask(void)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	/* Is the MMU in 29bit mode? */
70*4882a593Smuzhiyun 	if (__in_29bit_mode())
71*4882a593Smuzhiyun 		return PHYS_ADDR_MASK29;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	return PHYS_ADDR_MASK32;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define PTE_PHYS_MASK		(phys_addr_mask() & PAGE_MASK)
77*4882a593Smuzhiyun #define PTE_FLAGS_MASK		(~(PTE_PHYS_MASK) << PAGE_SHIFT)
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define VMALLOC_START	(P3SEG)
80*4882a593Smuzhiyun #define VMALLOC_END	(FIXADDR_START-2*PAGE_SIZE)
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun #include <asm/pgtable_32.h>
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /*
85*4882a593Smuzhiyun  * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
86*4882a593Smuzhiyun  * protection for execute, and considers it the same as a read. Also, write
87*4882a593Smuzhiyun  * permission implies read permission. This is the closest we can get..
88*4882a593Smuzhiyun  *
89*4882a593Smuzhiyun  * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme,
90*4882a593Smuzhiyun  * not only supporting separate execute, read, and write bits, but having
91*4882a593Smuzhiyun  * completely separate permission bits for user and kernel space.
92*4882a593Smuzhiyun  */
93*4882a593Smuzhiyun 	 /*xwr*/
94*4882a593Smuzhiyun #define __P000	PAGE_NONE
95*4882a593Smuzhiyun #define __P001	PAGE_READONLY
96*4882a593Smuzhiyun #define __P010	PAGE_COPY
97*4882a593Smuzhiyun #define __P011	PAGE_COPY
98*4882a593Smuzhiyun #define __P100	PAGE_EXECREAD
99*4882a593Smuzhiyun #define __P101	PAGE_EXECREAD
100*4882a593Smuzhiyun #define __P110	PAGE_COPY
101*4882a593Smuzhiyun #define __P111	PAGE_COPY
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun #define __S000	PAGE_NONE
104*4882a593Smuzhiyun #define __S001	PAGE_READONLY
105*4882a593Smuzhiyun #define __S010	PAGE_WRITEONLY
106*4882a593Smuzhiyun #define __S011	PAGE_SHARED
107*4882a593Smuzhiyun #define __S100	PAGE_EXECREAD
108*4882a593Smuzhiyun #define __S101	PAGE_EXECREAD
109*4882a593Smuzhiyun #define __S110	PAGE_RWX
110*4882a593Smuzhiyun #define __S111	PAGE_RWX
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun typedef pte_t *pte_addr_t;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #define kern_addr_valid(addr)	(1)
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun #define pte_pfn(x)		((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun struct vm_area_struct;
119*4882a593Smuzhiyun struct mm_struct;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun extern void __update_cache(struct vm_area_struct *vma,
122*4882a593Smuzhiyun 			   unsigned long address, pte_t pte);
123*4882a593Smuzhiyun extern void __update_tlb(struct vm_area_struct *vma,
124*4882a593Smuzhiyun 			 unsigned long address, pte_t pte);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun static inline void
update_mmu_cache(struct vm_area_struct * vma,unsigned long address,pte_t * ptep)127*4882a593Smuzhiyun update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun 	pte_t pte = *ptep;
130*4882a593Smuzhiyun 	__update_cache(vma, address, pte);
131*4882a593Smuzhiyun 	__update_tlb(vma, address, pte);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
135*4882a593Smuzhiyun extern void paging_init(void);
136*4882a593Smuzhiyun extern void page_table_range_init(unsigned long start, unsigned long end,
137*4882a593Smuzhiyun 				  pgd_t *pgd);
138*4882a593Smuzhiyun 
__pte_access_permitted(pte_t pte,u64 prot)139*4882a593Smuzhiyun static inline bool __pte_access_permitted(pte_t pte, u64 prot)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	return (pte_val(pte) & (prot | _PAGE_SPECIAL)) == prot;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun #ifdef CONFIG_X2TLB
pte_access_permitted(pte_t pte,bool write)145*4882a593Smuzhiyun static inline bool pte_access_permitted(pte_t pte, bool write)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	u64 prot = _PAGE_PRESENT;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	prot |= _PAGE_EXT(_PAGE_EXT_KERN_READ | _PAGE_EXT_USER_READ);
150*4882a593Smuzhiyun 	if (write)
151*4882a593Smuzhiyun 		prot |= _PAGE_EXT(_PAGE_EXT_KERN_WRITE | _PAGE_EXT_USER_WRITE);
152*4882a593Smuzhiyun 	return __pte_access_permitted(pte, prot);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun #else
pte_access_permitted(pte_t pte,bool write)155*4882a593Smuzhiyun static inline bool pte_access_permitted(pte_t pte, bool write)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	u64 prot = _PAGE_PRESENT | _PAGE_USER;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	if (write)
160*4882a593Smuzhiyun 		prot |= _PAGE_RW;
161*4882a593Smuzhiyun 	return __pte_access_permitted(pte, prot);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun #endif
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun #define pte_access_permitted pte_access_permitted
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun /* arch/sh/mm/mmap.c */
168*4882a593Smuzhiyun #define HAVE_ARCH_UNMAPPED_AREA
169*4882a593Smuzhiyun #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun #endif /* __ASM_SH_PGTABLE_H */
172