1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_SH_PERF_EVENT_H 3*4882a593Smuzhiyun #define __ASM_SH_PERF_EVENT_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun struct hw_perf_event; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define MAX_HWEVENTS 2 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun struct sh_pmu { 10*4882a593Smuzhiyun const char *name; 11*4882a593Smuzhiyun unsigned int num_events; 12*4882a593Smuzhiyun void (*disable_all)(void); 13*4882a593Smuzhiyun void (*enable_all)(void); 14*4882a593Smuzhiyun void (*enable)(struct hw_perf_event *, int); 15*4882a593Smuzhiyun void (*disable)(struct hw_perf_event *, int); 16*4882a593Smuzhiyun u64 (*read)(int); 17*4882a593Smuzhiyun int (*event_map)(int); 18*4882a593Smuzhiyun unsigned int max_events; 19*4882a593Smuzhiyun unsigned long raw_event_mask; 20*4882a593Smuzhiyun const int (*cache_events)[PERF_COUNT_HW_CACHE_MAX] 21*4882a593Smuzhiyun [PERF_COUNT_HW_CACHE_OP_MAX] 22*4882a593Smuzhiyun [PERF_COUNT_HW_CACHE_RESULT_MAX]; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* arch/sh/kernel/perf_event.c */ 26*4882a593Smuzhiyun extern int register_sh_pmu(struct sh_pmu *); 27*4882a593Smuzhiyun extern int reserve_pmc_hardware(void); 28*4882a593Smuzhiyun extern void release_pmc_hardware(void); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #endif /* __ASM_SH_PERF_EVENT_H */ 31