xref: /OK3568_Linux_fs/kernel/arch/sh/include/asm/entry-macros.S (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun! SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun! entry.S macro define
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun	.macro	cli
5*4882a593Smuzhiyun	stc	sr, r0
6*4882a593Smuzhiyun	or	#0xf0, r0
7*4882a593Smuzhiyun	ldc	r0, sr
8*4882a593Smuzhiyun	.endm
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun	.macro	sti
11*4882a593Smuzhiyun	mov	#0xfffffff0, r11
12*4882a593Smuzhiyun	extu.b	r11, r11
13*4882a593Smuzhiyun	not	r11, r11
14*4882a593Smuzhiyun	stc	sr, r10
15*4882a593Smuzhiyun	and	r11, r10
16*4882a593Smuzhiyun#ifdef CONFIG_CPU_HAS_SR_RB
17*4882a593Smuzhiyun	stc	k_g_imask, r11
18*4882a593Smuzhiyun	or	r11, r10
19*4882a593Smuzhiyun#endif
20*4882a593Smuzhiyun	ldc	r10, sr
21*4882a593Smuzhiyun	.endm
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	.macro	get_current_thread_info, ti, tmp
24*4882a593Smuzhiyun#ifdef CONFIG_CPU_HAS_SR_RB
25*4882a593Smuzhiyun	stc	r7_bank, \ti
26*4882a593Smuzhiyun#else
27*4882a593Smuzhiyun	mov	#((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp
28*4882a593Smuzhiyun	shll8	\tmp
29*4882a593Smuzhiyun	shll2	\tmp
30*4882a593Smuzhiyun	mov	r15, \ti
31*4882a593Smuzhiyun	and	\tmp, \ti
32*4882a593Smuzhiyun#endif
33*4882a593Smuzhiyun	.endm
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun#ifdef CONFIG_TRACE_IRQFLAGS
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun	.macro	TRACE_IRQS_ON
38*4882a593Smuzhiyun	mov.l	r0, @-r15
39*4882a593Smuzhiyun	mov.l	r1, @-r15
40*4882a593Smuzhiyun	mov.l	r2, @-r15
41*4882a593Smuzhiyun	mov.l	r3, @-r15
42*4882a593Smuzhiyun	mov.l	r4, @-r15
43*4882a593Smuzhiyun	mov.l	r5, @-r15
44*4882a593Smuzhiyun	mov.l	r6, @-r15
45*4882a593Smuzhiyun	mov.l	r7, @-r15
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	mov.l   7834f, r0
48*4882a593Smuzhiyun	jsr	@r0
49*4882a593Smuzhiyun	 nop
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	mov.l	@r15+, r7
52*4882a593Smuzhiyun	mov.l	@r15+, r6
53*4882a593Smuzhiyun	mov.l	@r15+, r5
54*4882a593Smuzhiyun	mov.l	@r15+, r4
55*4882a593Smuzhiyun	mov.l	@r15+, r3
56*4882a593Smuzhiyun	mov.l	@r15+, r2
57*4882a593Smuzhiyun	mov.l	@r15+, r1
58*4882a593Smuzhiyun	mov.l	@r15+, r0
59*4882a593Smuzhiyun	mov.l	7834f, r0
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	bra	7835f
62*4882a593Smuzhiyun	 nop
63*4882a593Smuzhiyun	.balign	4
64*4882a593Smuzhiyun7834:	.long	trace_hardirqs_on
65*4882a593Smuzhiyun7835:
66*4882a593Smuzhiyun	.endm
67*4882a593Smuzhiyun	.macro	TRACE_IRQS_OFF
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	mov.l	r0, @-r15
70*4882a593Smuzhiyun	mov.l	r1, @-r15
71*4882a593Smuzhiyun	mov.l	r2, @-r15
72*4882a593Smuzhiyun	mov.l	r3, @-r15
73*4882a593Smuzhiyun	mov.l	r4, @-r15
74*4882a593Smuzhiyun	mov.l	r5, @-r15
75*4882a593Smuzhiyun	mov.l	r6, @-r15
76*4882a593Smuzhiyun	mov.l	r7, @-r15
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	mov.l	7834f, r0
79*4882a593Smuzhiyun	jsr	@r0
80*4882a593Smuzhiyun	 nop
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun	mov.l	@r15+, r7
83*4882a593Smuzhiyun	mov.l	@r15+, r6
84*4882a593Smuzhiyun	mov.l	@r15+, r5
85*4882a593Smuzhiyun	mov.l	@r15+, r4
86*4882a593Smuzhiyun	mov.l	@r15+, r3
87*4882a593Smuzhiyun	mov.l	@r15+, r2
88*4882a593Smuzhiyun	mov.l	@r15+, r1
89*4882a593Smuzhiyun	mov.l	@r15+, r0
90*4882a593Smuzhiyun	mov.l	7834f, r0
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun	bra	7835f
93*4882a593Smuzhiyun	 nop
94*4882a593Smuzhiyun	.balign	4
95*4882a593Smuzhiyun7834:	.long	trace_hardirqs_off
96*4882a593Smuzhiyun7835:
97*4882a593Smuzhiyun	.endm
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun#else
100*4882a593Smuzhiyun	.macro	TRACE_IRQS_ON
101*4882a593Smuzhiyun	.endm
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun	.macro	TRACE_IRQS_OFF
104*4882a593Smuzhiyun	.endm
105*4882a593Smuzhiyun#endif
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
108*4882a593Smuzhiyun# define PREF(x)	pref	@x
109*4882a593Smuzhiyun#else
110*4882a593Smuzhiyun# define PREF(x)	nop
111*4882a593Smuzhiyun#endif
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	/*
114*4882a593Smuzhiyun	 * Macro for use within assembly. Because the DWARF unwinder
115*4882a593Smuzhiyun	 * needs to use the frame register to unwind the stack, we
116*4882a593Smuzhiyun	 * need to setup r14 with the value of the stack pointer as
117*4882a593Smuzhiyun	 * the return address is usually on the stack somewhere.
118*4882a593Smuzhiyun	 */
119*4882a593Smuzhiyun	.macro	setup_frame_reg
120*4882a593Smuzhiyun#ifdef CONFIG_DWARF_UNWINDER
121*4882a593Smuzhiyun	mov	r15, r14
122*4882a593Smuzhiyun#endif
123*4882a593Smuzhiyun	.endm
124