xref: /OK3568_Linux_fs/kernel/arch/sh/include/asm/dwarf.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright (C) 2009 Matt Fleming <matt@console-pimps.org>
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #ifndef __ASM_SH_DWARF_H
6*4882a593Smuzhiyun #define __ASM_SH_DWARF_H
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifdef CONFIG_DWARF_UNWINDER
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun  * DWARF expression operations
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun #define DW_OP_addr	0x03
14*4882a593Smuzhiyun #define DW_OP_deref	0x06
15*4882a593Smuzhiyun #define DW_OP_const1u	0x08
16*4882a593Smuzhiyun #define DW_OP_const1s	0x09
17*4882a593Smuzhiyun #define DW_OP_const2u	0x0a
18*4882a593Smuzhiyun #define DW_OP_const2s	0x0b
19*4882a593Smuzhiyun #define DW_OP_const4u	0x0c
20*4882a593Smuzhiyun #define DW_OP_const4s	0x0d
21*4882a593Smuzhiyun #define DW_OP_const8u	0x0e
22*4882a593Smuzhiyun #define DW_OP_const8s	0x0f
23*4882a593Smuzhiyun #define DW_OP_constu	0x10
24*4882a593Smuzhiyun #define DW_OP_consts	0x11
25*4882a593Smuzhiyun #define DW_OP_dup	0x12
26*4882a593Smuzhiyun #define DW_OP_drop	0x13
27*4882a593Smuzhiyun #define DW_OP_over	0x14
28*4882a593Smuzhiyun #define DW_OP_pick	0x15
29*4882a593Smuzhiyun #define DW_OP_swap	0x16
30*4882a593Smuzhiyun #define DW_OP_rot	0x17
31*4882a593Smuzhiyun #define DW_OP_xderef	0x18
32*4882a593Smuzhiyun #define DW_OP_abs	0x19
33*4882a593Smuzhiyun #define DW_OP_and	0x1a
34*4882a593Smuzhiyun #define DW_OP_div	0x1b
35*4882a593Smuzhiyun #define DW_OP_minus	0x1c
36*4882a593Smuzhiyun #define DW_OP_mod	0x1d
37*4882a593Smuzhiyun #define DW_OP_mul	0x1e
38*4882a593Smuzhiyun #define DW_OP_neg	0x1f
39*4882a593Smuzhiyun #define DW_OP_not	0x20
40*4882a593Smuzhiyun #define DW_OP_or	0x21
41*4882a593Smuzhiyun #define DW_OP_plus	0x22
42*4882a593Smuzhiyun #define DW_OP_plus_uconst	0x23
43*4882a593Smuzhiyun #define DW_OP_shl	0x24
44*4882a593Smuzhiyun #define DW_OP_shr	0x25
45*4882a593Smuzhiyun #define DW_OP_shra	0x26
46*4882a593Smuzhiyun #define DW_OP_xor	0x27
47*4882a593Smuzhiyun #define DW_OP_skip	0x2f
48*4882a593Smuzhiyun #define DW_OP_bra	0x28
49*4882a593Smuzhiyun #define DW_OP_eq	0x29
50*4882a593Smuzhiyun #define DW_OP_ge	0x2a
51*4882a593Smuzhiyun #define DW_OP_gt	0x2b
52*4882a593Smuzhiyun #define DW_OP_le	0x2c
53*4882a593Smuzhiyun #define DW_OP_lt	0x2d
54*4882a593Smuzhiyun #define DW_OP_ne	0x2e
55*4882a593Smuzhiyun #define DW_OP_lit0	0x30
56*4882a593Smuzhiyun #define DW_OP_lit1	0x31
57*4882a593Smuzhiyun #define DW_OP_lit2	0x32
58*4882a593Smuzhiyun #define DW_OP_lit3	0x33
59*4882a593Smuzhiyun #define DW_OP_lit4	0x34
60*4882a593Smuzhiyun #define DW_OP_lit5	0x35
61*4882a593Smuzhiyun #define DW_OP_lit6	0x36
62*4882a593Smuzhiyun #define DW_OP_lit7	0x37
63*4882a593Smuzhiyun #define DW_OP_lit8	0x38
64*4882a593Smuzhiyun #define DW_OP_lit9	0x39
65*4882a593Smuzhiyun #define DW_OP_lit10	0x3a
66*4882a593Smuzhiyun #define DW_OP_lit11	0x3b
67*4882a593Smuzhiyun #define DW_OP_lit12	0x3c
68*4882a593Smuzhiyun #define DW_OP_lit13	0x3d
69*4882a593Smuzhiyun #define DW_OP_lit14	0x3e
70*4882a593Smuzhiyun #define DW_OP_lit15	0x3f
71*4882a593Smuzhiyun #define DW_OP_lit16	0x40
72*4882a593Smuzhiyun #define DW_OP_lit17	0x41
73*4882a593Smuzhiyun #define DW_OP_lit18	0x42
74*4882a593Smuzhiyun #define DW_OP_lit19	0x43
75*4882a593Smuzhiyun #define DW_OP_lit20	0x44
76*4882a593Smuzhiyun #define DW_OP_lit21	0x45
77*4882a593Smuzhiyun #define DW_OP_lit22	0x46
78*4882a593Smuzhiyun #define DW_OP_lit23	0x47
79*4882a593Smuzhiyun #define DW_OP_lit24	0x48
80*4882a593Smuzhiyun #define DW_OP_lit25	0x49
81*4882a593Smuzhiyun #define DW_OP_lit26	0x4a
82*4882a593Smuzhiyun #define DW_OP_lit27	0x4b
83*4882a593Smuzhiyun #define DW_OP_lit28	0x4c
84*4882a593Smuzhiyun #define DW_OP_lit29	0x4d
85*4882a593Smuzhiyun #define DW_OP_lit30	0x4e
86*4882a593Smuzhiyun #define DW_OP_lit31	0x4f
87*4882a593Smuzhiyun #define DW_OP_reg0	0x50
88*4882a593Smuzhiyun #define DW_OP_reg1	0x51
89*4882a593Smuzhiyun #define DW_OP_reg2	0x52
90*4882a593Smuzhiyun #define DW_OP_reg3	0x53
91*4882a593Smuzhiyun #define DW_OP_reg4	0x54
92*4882a593Smuzhiyun #define DW_OP_reg5	0x55
93*4882a593Smuzhiyun #define DW_OP_reg6	0x56
94*4882a593Smuzhiyun #define DW_OP_reg7	0x57
95*4882a593Smuzhiyun #define DW_OP_reg8	0x58
96*4882a593Smuzhiyun #define DW_OP_reg9	0x59
97*4882a593Smuzhiyun #define DW_OP_reg10	0x5a
98*4882a593Smuzhiyun #define DW_OP_reg11	0x5b
99*4882a593Smuzhiyun #define DW_OP_reg12	0x5c
100*4882a593Smuzhiyun #define DW_OP_reg13	0x5d
101*4882a593Smuzhiyun #define DW_OP_reg14	0x5e
102*4882a593Smuzhiyun #define DW_OP_reg15	0x5f
103*4882a593Smuzhiyun #define DW_OP_reg16	0x60
104*4882a593Smuzhiyun #define DW_OP_reg17	0x61
105*4882a593Smuzhiyun #define DW_OP_reg18	0x62
106*4882a593Smuzhiyun #define DW_OP_reg19	0x63
107*4882a593Smuzhiyun #define DW_OP_reg20	0x64
108*4882a593Smuzhiyun #define DW_OP_reg21	0x65
109*4882a593Smuzhiyun #define DW_OP_reg22	0x66
110*4882a593Smuzhiyun #define DW_OP_reg23	0x67
111*4882a593Smuzhiyun #define DW_OP_reg24	0x68
112*4882a593Smuzhiyun #define DW_OP_reg25	0x69
113*4882a593Smuzhiyun #define DW_OP_reg26	0x6a
114*4882a593Smuzhiyun #define DW_OP_reg27	0x6b
115*4882a593Smuzhiyun #define DW_OP_reg28	0x6c
116*4882a593Smuzhiyun #define DW_OP_reg29	0x6d
117*4882a593Smuzhiyun #define DW_OP_reg30	0x6e
118*4882a593Smuzhiyun #define DW_OP_reg31	0x6f
119*4882a593Smuzhiyun #define DW_OP_breg0	0x70
120*4882a593Smuzhiyun #define DW_OP_breg1	0x71
121*4882a593Smuzhiyun #define DW_OP_breg2	0x72
122*4882a593Smuzhiyun #define DW_OP_breg3	0x73
123*4882a593Smuzhiyun #define DW_OP_breg4	0x74
124*4882a593Smuzhiyun #define DW_OP_breg5	0x75
125*4882a593Smuzhiyun #define DW_OP_breg6	0x76
126*4882a593Smuzhiyun #define DW_OP_breg7	0x77
127*4882a593Smuzhiyun #define DW_OP_breg8	0x78
128*4882a593Smuzhiyun #define DW_OP_breg9	0x79
129*4882a593Smuzhiyun #define DW_OP_breg10	0x7a
130*4882a593Smuzhiyun #define DW_OP_breg11	0x7b
131*4882a593Smuzhiyun #define DW_OP_breg12	0x7c
132*4882a593Smuzhiyun #define DW_OP_breg13	0x7d
133*4882a593Smuzhiyun #define DW_OP_breg14	0x7e
134*4882a593Smuzhiyun #define DW_OP_breg15	0x7f
135*4882a593Smuzhiyun #define DW_OP_breg16	0x80
136*4882a593Smuzhiyun #define DW_OP_breg17	0x81
137*4882a593Smuzhiyun #define DW_OP_breg18	0x82
138*4882a593Smuzhiyun #define DW_OP_breg19	0x83
139*4882a593Smuzhiyun #define DW_OP_breg20	0x84
140*4882a593Smuzhiyun #define DW_OP_breg21	0x85
141*4882a593Smuzhiyun #define DW_OP_breg22	0x86
142*4882a593Smuzhiyun #define DW_OP_breg23	0x87
143*4882a593Smuzhiyun #define DW_OP_breg24	0x88
144*4882a593Smuzhiyun #define DW_OP_breg25	0x89
145*4882a593Smuzhiyun #define DW_OP_breg26	0x8a
146*4882a593Smuzhiyun #define DW_OP_breg27	0x8b
147*4882a593Smuzhiyun #define DW_OP_breg28	0x8c
148*4882a593Smuzhiyun #define DW_OP_breg29	0x8d
149*4882a593Smuzhiyun #define DW_OP_breg30	0x8e
150*4882a593Smuzhiyun #define DW_OP_breg31	0x8f
151*4882a593Smuzhiyun #define DW_OP_regx	0x90
152*4882a593Smuzhiyun #define DW_OP_fbreg	0x91
153*4882a593Smuzhiyun #define DW_OP_bregx	0x92
154*4882a593Smuzhiyun #define DW_OP_piece	0x93
155*4882a593Smuzhiyun #define DW_OP_deref_size	0x94
156*4882a593Smuzhiyun #define DW_OP_xderef_size	0x95
157*4882a593Smuzhiyun #define DW_OP_nop	0x96
158*4882a593Smuzhiyun #define DW_OP_push_object_address	0x97
159*4882a593Smuzhiyun #define DW_OP_call2	0x98
160*4882a593Smuzhiyun #define DW_OP_call4	0x99
161*4882a593Smuzhiyun #define DW_OP_call_ref	0x9a
162*4882a593Smuzhiyun #define DW_OP_form_tls_address	0x9b
163*4882a593Smuzhiyun #define DW_OP_call_frame_cfa	0x9c
164*4882a593Smuzhiyun #define DW_OP_bit_piece	0x9d
165*4882a593Smuzhiyun #define DW_OP_lo_user	0xe0
166*4882a593Smuzhiyun #define DW_OP_hi_user	0xff
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun /*
169*4882a593Smuzhiyun  * Addresses used in FDE entries in the .eh_frame section may be encoded
170*4882a593Smuzhiyun  * using one of the following encodings.
171*4882a593Smuzhiyun  */
172*4882a593Smuzhiyun #define DW_EH_PE_absptr	0x00
173*4882a593Smuzhiyun #define DW_EH_PE_omit	0xff
174*4882a593Smuzhiyun #define DW_EH_PE_uleb128	0x01
175*4882a593Smuzhiyun #define DW_EH_PE_udata2	0x02
176*4882a593Smuzhiyun #define DW_EH_PE_udata4	0x03
177*4882a593Smuzhiyun #define DW_EH_PE_udata8	0x04
178*4882a593Smuzhiyun #define DW_EH_PE_sleb128	0x09
179*4882a593Smuzhiyun #define DW_EH_PE_sdata2	0x0a
180*4882a593Smuzhiyun #define DW_EH_PE_sdata4	0x0b
181*4882a593Smuzhiyun #define DW_EH_PE_sdata8	0x0c
182*4882a593Smuzhiyun #define DW_EH_PE_signed	0x09
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun #define DW_EH_PE_pcrel	0x10
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun /*
187*4882a593Smuzhiyun  * The architecture-specific register number that contains the return
188*4882a593Smuzhiyun  * address in the .debug_frame table.
189*4882a593Smuzhiyun  */
190*4882a593Smuzhiyun #define DWARF_ARCH_RA_REG	17
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun #ifndef __ASSEMBLY__
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun #include <linux/compiler.h>
195*4882a593Smuzhiyun #include <linux/bug.h>
196*4882a593Smuzhiyun #include <linux/list.h>
197*4882a593Smuzhiyun #include <linux/module.h>
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun /*
200*4882a593Smuzhiyun  * Read either the frame pointer (r14) or the stack pointer (r15).
201*4882a593Smuzhiyun  * NOTE: this MUST be inlined.
202*4882a593Smuzhiyun  */
dwarf_read_arch_reg(unsigned int reg)203*4882a593Smuzhiyun static __always_inline unsigned long dwarf_read_arch_reg(unsigned int reg)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun 	unsigned long value = 0;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	switch (reg) {
208*4882a593Smuzhiyun 	case 14:
209*4882a593Smuzhiyun 		__asm__ __volatile__("mov r14, %0\n" : "=r" (value));
210*4882a593Smuzhiyun 		break;
211*4882a593Smuzhiyun 	case 15:
212*4882a593Smuzhiyun 		__asm__ __volatile__("mov r15, %0\n" : "=r" (value));
213*4882a593Smuzhiyun 		break;
214*4882a593Smuzhiyun 	default:
215*4882a593Smuzhiyun 		BUG();
216*4882a593Smuzhiyun 	}
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	return value;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun /**
222*4882a593Smuzhiyun  *	dwarf_cie - Common Information Entry
223*4882a593Smuzhiyun  */
224*4882a593Smuzhiyun struct dwarf_cie {
225*4882a593Smuzhiyun 	unsigned long length;
226*4882a593Smuzhiyun 	unsigned long cie_id;
227*4882a593Smuzhiyun 	unsigned char version;
228*4882a593Smuzhiyun 	const char *augmentation;
229*4882a593Smuzhiyun 	unsigned int code_alignment_factor;
230*4882a593Smuzhiyun 	int data_alignment_factor;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	/* Which column in the rule table represents return addr of func. */
233*4882a593Smuzhiyun 	unsigned int return_address_reg;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	unsigned char *initial_instructions;
236*4882a593Smuzhiyun 	unsigned char *instructions_end;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	unsigned char encoding;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	unsigned long cie_pointer;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	unsigned long flags;
243*4882a593Smuzhiyun #define DWARF_CIE_Z_AUGMENTATION	(1 << 0)
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	/* linked-list entry if this CIE is from a module */
246*4882a593Smuzhiyun 	struct list_head link;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	struct rb_node node;
249*4882a593Smuzhiyun };
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun /**
252*4882a593Smuzhiyun  *	dwarf_fde - Frame Description Entry
253*4882a593Smuzhiyun  */
254*4882a593Smuzhiyun struct dwarf_fde {
255*4882a593Smuzhiyun 	unsigned long length;
256*4882a593Smuzhiyun 	unsigned long cie_pointer;
257*4882a593Smuzhiyun 	struct dwarf_cie *cie;
258*4882a593Smuzhiyun 	unsigned long initial_location;
259*4882a593Smuzhiyun 	unsigned long address_range;
260*4882a593Smuzhiyun 	unsigned char *instructions;
261*4882a593Smuzhiyun 	unsigned char *end;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	/* linked-list entry if this FDE is from a module */
264*4882a593Smuzhiyun 	struct list_head link;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	struct rb_node node;
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun /**
270*4882a593Smuzhiyun  *	dwarf_frame - DWARF information for a frame in the call stack
271*4882a593Smuzhiyun  */
272*4882a593Smuzhiyun struct dwarf_frame {
273*4882a593Smuzhiyun 	struct dwarf_frame *prev, *next;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	unsigned long pc;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	struct list_head reg_list;
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	unsigned long cfa;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	/* Valid when DW_FRAME_CFA_REG_OFFSET is set in flags */
282*4882a593Smuzhiyun 	unsigned int cfa_register;
283*4882a593Smuzhiyun 	unsigned int cfa_offset;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	/* Valid when DW_FRAME_CFA_REG_EXP is set in flags */
286*4882a593Smuzhiyun 	unsigned char *cfa_expr;
287*4882a593Smuzhiyun 	unsigned int cfa_expr_len;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	unsigned long flags;
290*4882a593Smuzhiyun #define DWARF_FRAME_CFA_REG_OFFSET	(1 << 0)
291*4882a593Smuzhiyun #define DWARF_FRAME_CFA_REG_EXP		(1 << 1)
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	unsigned long return_addr;
294*4882a593Smuzhiyun };
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun /**
297*4882a593Smuzhiyun  *	dwarf_reg - DWARF register
298*4882a593Smuzhiyun  *	@flags: Describes how to calculate the value of this register
299*4882a593Smuzhiyun  */
300*4882a593Smuzhiyun struct dwarf_reg {
301*4882a593Smuzhiyun 	struct list_head link;
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	unsigned int number;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	unsigned long addr;
306*4882a593Smuzhiyun 	unsigned long flags;
307*4882a593Smuzhiyun #define DWARF_REG_OFFSET	(1 << 0)
308*4882a593Smuzhiyun #define DWARF_VAL_OFFSET	(1 << 1)
309*4882a593Smuzhiyun #define DWARF_UNDEFINED		(1 << 2)
310*4882a593Smuzhiyun };
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun /*
313*4882a593Smuzhiyun  * Call Frame instruction opcodes.
314*4882a593Smuzhiyun  */
315*4882a593Smuzhiyun #define DW_CFA_advance_loc	0x40
316*4882a593Smuzhiyun #define DW_CFA_offset		0x80
317*4882a593Smuzhiyun #define DW_CFA_restore		0xc0
318*4882a593Smuzhiyun #define DW_CFA_nop		0x00
319*4882a593Smuzhiyun #define DW_CFA_set_loc		0x01
320*4882a593Smuzhiyun #define DW_CFA_advance_loc1	0x02
321*4882a593Smuzhiyun #define DW_CFA_advance_loc2	0x03
322*4882a593Smuzhiyun #define DW_CFA_advance_loc4	0x04
323*4882a593Smuzhiyun #define DW_CFA_offset_extended	0x05
324*4882a593Smuzhiyun #define DW_CFA_restore_extended	0x06
325*4882a593Smuzhiyun #define DW_CFA_undefined	0x07
326*4882a593Smuzhiyun #define DW_CFA_same_value	0x08
327*4882a593Smuzhiyun #define DW_CFA_register		0x09
328*4882a593Smuzhiyun #define DW_CFA_remember_state	0x0a
329*4882a593Smuzhiyun #define DW_CFA_restore_state	0x0b
330*4882a593Smuzhiyun #define DW_CFA_def_cfa		0x0c
331*4882a593Smuzhiyun #define DW_CFA_def_cfa_register	0x0d
332*4882a593Smuzhiyun #define DW_CFA_def_cfa_offset	0x0e
333*4882a593Smuzhiyun #define DW_CFA_def_cfa_expression	0x0f
334*4882a593Smuzhiyun #define DW_CFA_expression	0x10
335*4882a593Smuzhiyun #define DW_CFA_offset_extended_sf	0x11
336*4882a593Smuzhiyun #define DW_CFA_def_cfa_sf	0x12
337*4882a593Smuzhiyun #define DW_CFA_def_cfa_offset_sf	0x13
338*4882a593Smuzhiyun #define DW_CFA_val_offset	0x14
339*4882a593Smuzhiyun #define DW_CFA_val_offset_sf	0x15
340*4882a593Smuzhiyun #define DW_CFA_val_expression	0x16
341*4882a593Smuzhiyun #define DW_CFA_lo_user		0x1c
342*4882a593Smuzhiyun #define DW_CFA_hi_user		0x3f
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun /* GNU extension opcodes  */
345*4882a593Smuzhiyun #define DW_CFA_GNU_args_size	0x2e
346*4882a593Smuzhiyun #define DW_CFA_GNU_negative_offset_extended 0x2f
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun /*
349*4882a593Smuzhiyun  * Some call frame instructions encode their operands in the opcode. We
350*4882a593Smuzhiyun  * need some helper functions to extract both the opcode and operands
351*4882a593Smuzhiyun  * from an instruction.
352*4882a593Smuzhiyun  */
DW_CFA_opcode(unsigned long insn)353*4882a593Smuzhiyun static inline unsigned int DW_CFA_opcode(unsigned long insn)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun 	return (insn & 0xc0);
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun 
DW_CFA_operand(unsigned long insn)358*4882a593Smuzhiyun static inline unsigned int DW_CFA_operand(unsigned long insn)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun 	return (insn & 0x3f);
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun #define DW_EH_FRAME_CIE	0		/* .eh_frame CIE IDs are 0 */
364*4882a593Smuzhiyun #define DW_CIE_ID	0xffffffff
365*4882a593Smuzhiyun #define DW64_CIE_ID	0xffffffffffffffffULL
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun /*
368*4882a593Smuzhiyun  * DWARF FDE/CIE length field values.
369*4882a593Smuzhiyun  */
370*4882a593Smuzhiyun #define DW_EXT_LO	0xfffffff0
371*4882a593Smuzhiyun #define DW_EXT_HI	0xffffffff
372*4882a593Smuzhiyun #define DW_EXT_DWARF64	DW_EXT_HI
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
375*4882a593Smuzhiyun 					      struct dwarf_frame *);
376*4882a593Smuzhiyun extern void dwarf_free_frame(struct dwarf_frame *);
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun extern int module_dwarf_finalize(const Elf_Ehdr *, const Elf_Shdr *,
379*4882a593Smuzhiyun 				 struct module *);
380*4882a593Smuzhiyun extern void module_dwarf_cleanup(struct module *);
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun #endif /* !__ASSEMBLY__ */
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun #define CFI_STARTPROC	.cfi_startproc
385*4882a593Smuzhiyun #define CFI_ENDPROC	.cfi_endproc
386*4882a593Smuzhiyun #define CFI_DEF_CFA	.cfi_def_cfa
387*4882a593Smuzhiyun #define CFI_REGISTER	.cfi_register
388*4882a593Smuzhiyun #define CFI_REL_OFFSET	.cfi_rel_offset
389*4882a593Smuzhiyun #define CFI_UNDEFINED	.cfi_undefined
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun #else
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun /*
394*4882a593Smuzhiyun  * Use the asm comment character to ignore the rest of the line.
395*4882a593Smuzhiyun  */
396*4882a593Smuzhiyun #define CFI_IGNORE	!
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun #define CFI_STARTPROC	CFI_IGNORE
399*4882a593Smuzhiyun #define CFI_ENDPROC	CFI_IGNORE
400*4882a593Smuzhiyun #define CFI_DEF_CFA	CFI_IGNORE
401*4882a593Smuzhiyun #define CFI_REGISTER	CFI_IGNORE
402*4882a593Smuzhiyun #define CFI_REL_OFFSET	CFI_IGNORE
403*4882a593Smuzhiyun #define CFI_UNDEFINED	CFI_IGNORE
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun #ifndef __ASSEMBLY__
dwarf_unwinder_init(void)406*4882a593Smuzhiyun static inline void dwarf_unwinder_init(void)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun #define module_dwarf_finalize(hdr, sechdrs, me)	(0)
411*4882a593Smuzhiyun #define module_dwarf_cleanup(mod)		do { } while (0)
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun #endif
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun #endif /* CONFIG_DWARF_UNWINDER */
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun #endif /* __ASM_SH_DWARF_H */
418