1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef __ASM_SH_BITOPS_CAS_H
3*4882a593Smuzhiyun #define __ASM_SH_BITOPS_CAS_H
4*4882a593Smuzhiyun
__bo_cas(volatile unsigned * p,unsigned old,unsigned new)5*4882a593Smuzhiyun static inline unsigned __bo_cas(volatile unsigned *p, unsigned old, unsigned new)
6*4882a593Smuzhiyun {
7*4882a593Smuzhiyun __asm__ __volatile__("cas.l %1,%0,@r0"
8*4882a593Smuzhiyun : "+r"(new)
9*4882a593Smuzhiyun : "r"(old), "z"(p)
10*4882a593Smuzhiyun : "t", "memory" );
11*4882a593Smuzhiyun return new;
12*4882a593Smuzhiyun }
13*4882a593Smuzhiyun
set_bit(int nr,volatile void * addr)14*4882a593Smuzhiyun static inline void set_bit(int nr, volatile void *addr)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun unsigned mask, old;
17*4882a593Smuzhiyun volatile unsigned *a = addr;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun a += nr >> 5;
20*4882a593Smuzhiyun mask = 1U << (nr & 0x1f);
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun do old = *a;
23*4882a593Smuzhiyun while (__bo_cas(a, old, old|mask) != old);
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun
clear_bit(int nr,volatile void * addr)26*4882a593Smuzhiyun static inline void clear_bit(int nr, volatile void *addr)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun unsigned mask, old;
29*4882a593Smuzhiyun volatile unsigned *a = addr;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun a += nr >> 5;
32*4882a593Smuzhiyun mask = 1U << (nr & 0x1f);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun do old = *a;
35*4882a593Smuzhiyun while (__bo_cas(a, old, old&~mask) != old);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
change_bit(int nr,volatile void * addr)38*4882a593Smuzhiyun static inline void change_bit(int nr, volatile void *addr)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun unsigned mask, old;
41*4882a593Smuzhiyun volatile unsigned *a = addr;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun a += nr >> 5;
44*4882a593Smuzhiyun mask = 1U << (nr & 0x1f);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun do old = *a;
47*4882a593Smuzhiyun while (__bo_cas(a, old, old^mask) != old);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
test_and_set_bit(int nr,volatile void * addr)50*4882a593Smuzhiyun static inline int test_and_set_bit(int nr, volatile void *addr)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun unsigned mask, old;
53*4882a593Smuzhiyun volatile unsigned *a = addr;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun a += nr >> 5;
56*4882a593Smuzhiyun mask = 1U << (nr & 0x1f);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun do old = *a;
59*4882a593Smuzhiyun while (__bo_cas(a, old, old|mask) != old);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun return !!(old & mask);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
test_and_clear_bit(int nr,volatile void * addr)64*4882a593Smuzhiyun static inline int test_and_clear_bit(int nr, volatile void *addr)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun unsigned mask, old;
67*4882a593Smuzhiyun volatile unsigned *a = addr;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun a += nr >> 5;
70*4882a593Smuzhiyun mask = 1U << (nr & 0x1f);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun do old = *a;
73*4882a593Smuzhiyun while (__bo_cas(a, old, old&~mask) != old);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return !!(old & mask);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
test_and_change_bit(int nr,volatile void * addr)78*4882a593Smuzhiyun static inline int test_and_change_bit(int nr, volatile void *addr)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun unsigned mask, old;
81*4882a593Smuzhiyun volatile unsigned *a = addr;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun a += nr >> 5;
84*4882a593Smuzhiyun mask = 1U << (nr & 0x1f);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun do old = *a;
87*4882a593Smuzhiyun while (__bo_cas(a, old, old^mask) != old);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun return !!(old & mask);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun #include <asm-generic/bitops/non-atomic.h>
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun #endif /* __ASM_SH_BITOPS_CAS_H */
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