1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyunmenu "DMA support" 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun 5*4882a593Smuzhiyunconfig SH_DMA 6*4882a593Smuzhiyun bool "SuperH on-chip DMA controller (DMAC) support" 7*4882a593Smuzhiyun depends on CPU_SH3 || CPU_SH4 8*4882a593Smuzhiyun default n 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunconfig SH_DMA_IRQ_MULTI 11*4882a593Smuzhiyun bool 12*4882a593Smuzhiyun depends on SH_DMA 13*4882a593Smuzhiyun default y if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \ 14*4882a593Smuzhiyun CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || \ 15*4882a593Smuzhiyun CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7091 || \ 16*4882a593Smuzhiyun CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7780 || \ 17*4882a593Smuzhiyun CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7760 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunconfig SH_DMA_API 20*4882a593Smuzhiyun depends on SH_DMA 21*4882a593Smuzhiyun bool "SuperH DMA API support" 22*4882a593Smuzhiyun default n 23*4882a593Smuzhiyun help 24*4882a593Smuzhiyun SH_DMA_API always enabled DMA API of used SuperH. 25*4882a593Smuzhiyun If you want to use DMA ENGINE, you must not enable this. 26*4882a593Smuzhiyun Please enable DMA_ENGINE and SH_DMAE. 27*4882a593Smuzhiyun 28*4882a593Smuzhiyunconfig NR_ONCHIP_DMA_CHANNELS 29*4882a593Smuzhiyun int 30*4882a593Smuzhiyun depends on SH_DMA 31*4882a593Smuzhiyun default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \ 32*4882a593Smuzhiyun CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091 33*4882a593Smuzhiyun default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \ 34*4882a593Smuzhiyun CPU_SUBTYPE_SH7760 35*4882a593Smuzhiyun default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \ 36*4882a593Smuzhiyun CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724 37*4882a593Smuzhiyun default "6" 38*4882a593Smuzhiyun help 39*4882a593Smuzhiyun This allows you to specify the number of channels that the on-chip 40*4882a593Smuzhiyun DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the 41*4882a593Smuzhiyun SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6. 42*4882a593Smuzhiyun 43*4882a593Smuzhiyunconfig SH_DMABRG 44*4882a593Smuzhiyun bool "SH7760 DMABRG support" 45*4882a593Smuzhiyun depends on CPU_SUBTYPE_SH7760 46*4882a593Smuzhiyun help 47*4882a593Smuzhiyun The DMABRG does data transfers from main memory to Audio/USB units 48*4882a593Smuzhiyun of the SH7760. 49*4882a593Smuzhiyun Say Y if you want to use Audio/USB DMA on your SH7760 board. 50*4882a593Smuzhiyun 51*4882a593Smuzhiyunconfig PVR2_DMA 52*4882a593Smuzhiyun tristate "PowerVR 2 DMAC support" 53*4882a593Smuzhiyun depends on SH_DREAMCAST && SH_DMA 54*4882a593Smuzhiyun help 55*4882a593Smuzhiyun Selecting this will enable support for the PVR2 DMA controller. 56*4882a593Smuzhiyun As this chains off of the on-chip DMAC, that must also be 57*4882a593Smuzhiyun enabled by default. 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun This is primarily used by the pvr2fb framebuffer driver for 60*4882a593Smuzhiyun certain optimizations, but is not necessary for functionality. 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun If in doubt, say N. 63*4882a593Smuzhiyun 64*4882a593Smuzhiyunconfig G2_DMA 65*4882a593Smuzhiyun tristate "G2 Bus DMA support" 66*4882a593Smuzhiyun depends on SH_DREAMCAST && SH_DMA_API 67*4882a593Smuzhiyun help 68*4882a593Smuzhiyun This enables support for the DMA controller for the Dreamcast's 69*4882a593Smuzhiyun G2 bus. Drivers that want this will generally enable this on 70*4882a593Smuzhiyun their own. 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun If in doubt, say N. 73*4882a593Smuzhiyun 74*4882a593Smuzhiyunendmenu 75