1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * arch/sh/boards/mach-x3proto/ilsel.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Helper routines for SH-X3 proto board ILSEL.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2007 - 2010 Paul Mundt
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/bitmap.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <mach/ilsel.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /*
19*4882a593Smuzhiyun * ILSEL is split across:
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * ILSEL0 - 0xb8100004 [ Levels 1 - 4 ]
22*4882a593Smuzhiyun * ILSEL1 - 0xb8100006 [ Levels 5 - 8 ]
23*4882a593Smuzhiyun * ILSEL2 - 0xb8100008 [ Levels 9 - 12 ]
24*4882a593Smuzhiyun * ILSEL3 - 0xb810000a [ Levels 13 - 15 ]
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun * With each level being relative to an ilsel_source_t.
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun #define ILSEL_BASE 0xb8100004
29*4882a593Smuzhiyun #define ILSEL_LEVELS 15
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * ILSEL level map, in descending order from the highest level down.
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * Supported levels are 1 - 15 spread across ILSEL0 - ILSEL4, mapping
35*4882a593Smuzhiyun * directly to IRLs. As the IRQs are numbered in reverse order relative
36*4882a593Smuzhiyun * to the interrupt level, the level map is carefully managed to ensure a
37*4882a593Smuzhiyun * 1:1 mapping between the bit position and the IRQ number.
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * This careful constructions allows ilsel_enable*() to be referenced
40*4882a593Smuzhiyun * directly for hooking up an ILSEL set and getting back an IRQ which can
41*4882a593Smuzhiyun * subsequently be used for internal accounting in the (optional) disable
42*4882a593Smuzhiyun * path.
43*4882a593Smuzhiyun */
44*4882a593Smuzhiyun static unsigned long ilsel_level_map;
45*4882a593Smuzhiyun
ilsel_offset(unsigned int bit)46*4882a593Smuzhiyun static inline unsigned int ilsel_offset(unsigned int bit)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun return ILSEL_LEVELS - bit - 1;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
mk_ilsel_addr(unsigned int bit)51*4882a593Smuzhiyun static inline unsigned long mk_ilsel_addr(unsigned int bit)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun return ILSEL_BASE + ((ilsel_offset(bit) >> 1) & ~0x1);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
mk_ilsel_shift(unsigned int bit)56*4882a593Smuzhiyun static inline unsigned int mk_ilsel_shift(unsigned int bit)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun return (ilsel_offset(bit) & 0x3) << 2;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
__ilsel_enable(ilsel_source_t set,unsigned int bit)61*4882a593Smuzhiyun static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun unsigned int tmp, shift;
64*4882a593Smuzhiyun unsigned long addr;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun pr_notice("enabling ILSEL set %d\n", set);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun addr = mk_ilsel_addr(bit);
69*4882a593Smuzhiyun shift = mk_ilsel_shift(bit);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
72*4882a593Smuzhiyun __func__, bit, addr, shift, set);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun tmp = __raw_readw(addr);
75*4882a593Smuzhiyun tmp &= ~(0xf << shift);
76*4882a593Smuzhiyun tmp |= set << shift;
77*4882a593Smuzhiyun __raw_writew(tmp, addr);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /**
81*4882a593Smuzhiyun * ilsel_enable - Enable an ILSEL set.
82*4882a593Smuzhiyun * @set: ILSEL source (see ilsel_source_t enum in include/asm-sh/ilsel.h).
83*4882a593Smuzhiyun *
84*4882a593Smuzhiyun * Enables a given non-aliased ILSEL source (<= ILSEL_KEY) at the highest
85*4882a593Smuzhiyun * available interrupt level. Callers should take care to order callsites
86*4882a593Smuzhiyun * noting descending interrupt levels. Aliasing FPGA and external board
87*4882a593Smuzhiyun * IRQs need to use ilsel_enable_fixed().
88*4882a593Smuzhiyun *
89*4882a593Smuzhiyun * The return value is an IRQ number that can later be taken down with
90*4882a593Smuzhiyun * ilsel_disable().
91*4882a593Smuzhiyun */
ilsel_enable(ilsel_source_t set)92*4882a593Smuzhiyun int ilsel_enable(ilsel_source_t set)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun unsigned int bit;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun if (unlikely(set > ILSEL_KEY)) {
97*4882a593Smuzhiyun pr_err("Aliased sources must use ilsel_enable_fixed()\n");
98*4882a593Smuzhiyun return -EINVAL;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun do {
102*4882a593Smuzhiyun bit = find_first_zero_bit(&ilsel_level_map, ILSEL_LEVELS);
103*4882a593Smuzhiyun } while (test_and_set_bit(bit, &ilsel_level_map));
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun __ilsel_enable(set, bit);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun return bit;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ilsel_enable);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /**
112*4882a593Smuzhiyun * ilsel_enable_fixed - Enable an ILSEL set at a fixed interrupt level
113*4882a593Smuzhiyun * @set: ILSEL source (see ilsel_source_t enum in include/asm-sh/ilsel.h).
114*4882a593Smuzhiyun * @level: Interrupt level (1 - 15)
115*4882a593Smuzhiyun *
116*4882a593Smuzhiyun * Enables a given ILSEL source at a fixed interrupt level. Necessary
117*4882a593Smuzhiyun * both for level reservation as well as for aliased sources that only
118*4882a593Smuzhiyun * exist on special ILSEL#s.
119*4882a593Smuzhiyun *
120*4882a593Smuzhiyun * Returns an IRQ number (as ilsel_enable()).
121*4882a593Smuzhiyun */
ilsel_enable_fixed(ilsel_source_t set,unsigned int level)122*4882a593Smuzhiyun int ilsel_enable_fixed(ilsel_source_t set, unsigned int level)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun unsigned int bit = ilsel_offset(level - 1);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (test_and_set_bit(bit, &ilsel_level_map))
127*4882a593Smuzhiyun return -EBUSY;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun __ilsel_enable(set, bit);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return bit;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ilsel_enable_fixed);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /**
136*4882a593Smuzhiyun * ilsel_disable - Disable an ILSEL set
137*4882a593Smuzhiyun * @irq: Bit position for ILSEL set value (retval from enable routines)
138*4882a593Smuzhiyun *
139*4882a593Smuzhiyun * Disable a previously enabled ILSEL set.
140*4882a593Smuzhiyun */
ilsel_disable(unsigned int irq)141*4882a593Smuzhiyun void ilsel_disable(unsigned int irq)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun unsigned long addr;
144*4882a593Smuzhiyun unsigned int tmp;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun pr_notice("disabling ILSEL set %d\n", irq);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun addr = mk_ilsel_addr(irq);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun tmp = __raw_readw(addr);
151*4882a593Smuzhiyun tmp &= ~(0xf << mk_ilsel_shift(irq));
152*4882a593Smuzhiyun __raw_writew(tmp, addr);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun clear_bit(irq, &ilsel_level_map);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(ilsel_disable);
157