xref: /OK3568_Linux_fs/kernel/arch/sh/boards/mach-se/7722/setup.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * linux/arch/sh/boards/se/7722/setup.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2007 Nobuhiro Iwamatsu
6*4882a593Smuzhiyun  * Copyright (C) 2012 Paul Mundt
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Hitachi UL SolutionEngine 7722 Support.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/ata_platform.h>
13*4882a593Smuzhiyun #include <linux/input.h>
14*4882a593Smuzhiyun #include <linux/input/sh_keysc.h>
15*4882a593Smuzhiyun #include <linux/irqdomain.h>
16*4882a593Smuzhiyun #include <linux/smc91x.h>
17*4882a593Smuzhiyun #include <linux/sh_intc.h>
18*4882a593Smuzhiyun #include <mach-se/mach/se7722.h>
19*4882a593Smuzhiyun #include <mach-se/mach/mrshpc.h>
20*4882a593Smuzhiyun #include <asm/machvec.h>
21*4882a593Smuzhiyun #include <asm/clock.h>
22*4882a593Smuzhiyun #include <asm/io.h>
23*4882a593Smuzhiyun #include <asm/heartbeat.h>
24*4882a593Smuzhiyun #include <cpu/sh7722.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /* Heartbeat */
27*4882a593Smuzhiyun static struct resource heartbeat_resource = {
28*4882a593Smuzhiyun 	.start  = PA_LED,
29*4882a593Smuzhiyun 	.end    = PA_LED,
30*4882a593Smuzhiyun 	.flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static struct platform_device heartbeat_device = {
34*4882a593Smuzhiyun 	.name           = "heartbeat",
35*4882a593Smuzhiyun 	.id             = -1,
36*4882a593Smuzhiyun 	.num_resources  = 1,
37*4882a593Smuzhiyun 	.resource       = &heartbeat_resource,
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /* SMC91x */
41*4882a593Smuzhiyun static struct smc91x_platdata smc91x_info = {
42*4882a593Smuzhiyun 	.flags = SMC91X_USE_16BIT,
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun static struct resource smc91x_eth_resources[] = {
46*4882a593Smuzhiyun 	[0] = {
47*4882a593Smuzhiyun 		.name   = "smc91x-regs" ,
48*4882a593Smuzhiyun 		.start  = PA_LAN + 0x300,
49*4882a593Smuzhiyun 		.end    = PA_LAN + 0x300 + 0x10 ,
50*4882a593Smuzhiyun 		.flags  = IORESOURCE_MEM,
51*4882a593Smuzhiyun 	},
52*4882a593Smuzhiyun 	[1] = {
53*4882a593Smuzhiyun 		/* Filled in later */
54*4882a593Smuzhiyun 		.flags  = IORESOURCE_IRQ,
55*4882a593Smuzhiyun 	},
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun static struct platform_device smc91x_eth_device = {
59*4882a593Smuzhiyun 	.name           = "smc91x",
60*4882a593Smuzhiyun 	.id             = 0,
61*4882a593Smuzhiyun 	.dev = {
62*4882a593Smuzhiyun 		.dma_mask               = NULL,         /* don't use dma */
63*4882a593Smuzhiyun 		.coherent_dma_mask      = 0xffffffff,
64*4882a593Smuzhiyun 		.platform_data	= &smc91x_info,
65*4882a593Smuzhiyun 	},
66*4882a593Smuzhiyun 	.num_resources  = ARRAY_SIZE(smc91x_eth_resources),
67*4882a593Smuzhiyun 	.resource       = smc91x_eth_resources,
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun static struct resource cf_ide_resources[] = {
71*4882a593Smuzhiyun 	[0] = {
72*4882a593Smuzhiyun 		.start  = PA_MRSHPC_IO + 0x1f0,
73*4882a593Smuzhiyun 		.end    = PA_MRSHPC_IO + 0x1f0 + 8 ,
74*4882a593Smuzhiyun 		.flags  = IORESOURCE_IO,
75*4882a593Smuzhiyun 	},
76*4882a593Smuzhiyun 	[1] = {
77*4882a593Smuzhiyun 		.start  = PA_MRSHPC_IO + 0x1f0 + 0x206,
78*4882a593Smuzhiyun 		.end    = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
79*4882a593Smuzhiyun 		.flags  = IORESOURCE_IO,
80*4882a593Smuzhiyun 	},
81*4882a593Smuzhiyun 	[2] = {
82*4882a593Smuzhiyun 		/* Filled in later */
83*4882a593Smuzhiyun 		.flags  = IORESOURCE_IRQ,
84*4882a593Smuzhiyun 	},
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun static struct platform_device cf_ide_device  = {
88*4882a593Smuzhiyun 	.name           = "pata_platform",
89*4882a593Smuzhiyun 	.id             = -1,
90*4882a593Smuzhiyun 	.num_resources  = ARRAY_SIZE(cf_ide_resources),
91*4882a593Smuzhiyun 	.resource       = cf_ide_resources,
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun static struct sh_keysc_info sh_keysc_info = {
95*4882a593Smuzhiyun 	.mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
96*4882a593Smuzhiyun 	.scan_timing = 3,
97*4882a593Smuzhiyun 	.delay = 5,
98*4882a593Smuzhiyun 	.keycodes = { /* SW1 -> SW30 */
99*4882a593Smuzhiyun 		KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
100*4882a593Smuzhiyun 		KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
101*4882a593Smuzhiyun 		KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
102*4882a593Smuzhiyun 		KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
103*4882a593Smuzhiyun 		KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
104*4882a593Smuzhiyun 		KEY_Z,
105*4882a593Smuzhiyun 		KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
106*4882a593Smuzhiyun 	},
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun static struct resource sh_keysc_resources[] = {
110*4882a593Smuzhiyun 	[0] = {
111*4882a593Smuzhiyun 		.start  = 0x044b0000,
112*4882a593Smuzhiyun 		.end    = 0x044b000f,
113*4882a593Smuzhiyun 		.flags  = IORESOURCE_MEM,
114*4882a593Smuzhiyun 	},
115*4882a593Smuzhiyun 	[1] = {
116*4882a593Smuzhiyun 		.start  = evt2irq(0xbe0),
117*4882a593Smuzhiyun 		.flags  = IORESOURCE_IRQ,
118*4882a593Smuzhiyun 	},
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun static struct platform_device sh_keysc_device = {
122*4882a593Smuzhiyun 	.name           = "sh_keysc",
123*4882a593Smuzhiyun 	.id             = 0, /* "keysc0" clock */
124*4882a593Smuzhiyun 	.num_resources  = ARRAY_SIZE(sh_keysc_resources),
125*4882a593Smuzhiyun 	.resource       = sh_keysc_resources,
126*4882a593Smuzhiyun 	.dev	= {
127*4882a593Smuzhiyun 		.platform_data	= &sh_keysc_info,
128*4882a593Smuzhiyun 	},
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun static struct platform_device *se7722_devices[] __initdata = {
132*4882a593Smuzhiyun 	&heartbeat_device,
133*4882a593Smuzhiyun 	&smc91x_eth_device,
134*4882a593Smuzhiyun 	&cf_ide_device,
135*4882a593Smuzhiyun 	&sh_keysc_device,
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
se7722_devices_setup(void)138*4882a593Smuzhiyun static int __init se7722_devices_setup(void)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	mrshpc_setup_windows();
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	/* Wire-up dynamic vectors */
143*4882a593Smuzhiyun 	cf_ide_resources[2].start = cf_ide_resources[2].end =
144*4882a593Smuzhiyun 		irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
147*4882a593Smuzhiyun 		irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun device_initcall(se7722_devices_setup);
152*4882a593Smuzhiyun 
se7722_setup(char ** cmdline_p)153*4882a593Smuzhiyun static void __init se7722_setup(char **cmdline_p)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	__raw_writew(0x010D, FPGA_OUT);    /* FPGA */
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	__raw_writew(0x0000, PORT_PECR);   /* PORT E 1 = IRQ5 ,E 0 = BS */
158*4882a593Smuzhiyun 	__raw_writew(0x1000, PORT_PJCR);   /* PORT J 1 = IRQ1,J 0 =IRQ0 */
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	/* LCDC I/O */
161*4882a593Smuzhiyun 	__raw_writew(0x0020, PORT_PSELD);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	/* SIOF1*/
164*4882a593Smuzhiyun 	__raw_writew(0x0003, PORT_PSELB);
165*4882a593Smuzhiyun 	__raw_writew(0xe000, PORT_PSELC);
166*4882a593Smuzhiyun 	__raw_writew(0x0000, PORT_PKCR);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/* LCDC */
169*4882a593Smuzhiyun 	__raw_writew(0x4020, PORT_PHCR);
170*4882a593Smuzhiyun 	__raw_writew(0x0000, PORT_PLCR);
171*4882a593Smuzhiyun 	__raw_writew(0x0000, PORT_PMCR);
172*4882a593Smuzhiyun 	__raw_writew(0x0002, PORT_PRCR);
173*4882a593Smuzhiyun 	__raw_writew(0x0000, PORT_PXCR);   /* LCDC,CS6A */
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	/* KEYSC */
176*4882a593Smuzhiyun 	__raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
177*4882a593Smuzhiyun 	__raw_writew(0x0000, PORT_PYCR);
178*4882a593Smuzhiyun 	__raw_writew(0x0000, PORT_PZCR);
179*4882a593Smuzhiyun 	__raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
180*4882a593Smuzhiyun 	__raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun /*
184*4882a593Smuzhiyun  * The Machine Vector
185*4882a593Smuzhiyun  */
186*4882a593Smuzhiyun static struct sh_machine_vector mv_se7722 __initmv = {
187*4882a593Smuzhiyun 	.mv_name                = "Solution Engine 7722" ,
188*4882a593Smuzhiyun 	.mv_setup               = se7722_setup ,
189*4882a593Smuzhiyun 	.mv_init_irq		= init_se7722_IRQ,
190*4882a593Smuzhiyun };
191