1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/sh/boards/renesas/rts7751r2d/irq.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2007 Magnus Damm
6*4882a593Smuzhiyun * Copyright (C) 2000 Kazumoto Kojima
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Renesas Technology Sales RTS7751R2D Support, R2D-PLUS and R2D-1.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Modified for RTS7751R2D by
11*4882a593Smuzhiyun * Atom Create Engineering Co., Ltd. 2002.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/irq.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <mach/r2d.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define R2D_NR_IRL 13
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun enum {
22*4882a593Smuzhiyun UNUSED = 0,
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /* board specific interrupt sources (R2D-1 and R2D-PLUS) */
25*4882a593Smuzhiyun EXT, /* EXT_INT0-3 */
26*4882a593Smuzhiyun RTC_T, RTC_A, /* Real Time Clock */
27*4882a593Smuzhiyun AX88796, /* Ethernet controller (R2D-1 board) */
28*4882a593Smuzhiyun KEY, /* Key input (R2D-PLUS board) */
29*4882a593Smuzhiyun SDCARD, /* SD Card */
30*4882a593Smuzhiyun CF_CD, CF_IDE, /* CF Card Detect + CF IDE */
31*4882a593Smuzhiyun SM501, /* SM501 aka Voyager */
32*4882a593Smuzhiyun PCI_INTD_RTL8139, /* Ethernet controller */
33*4882a593Smuzhiyun PCI_INTC_PCI1520, /* Cardbus/PCMCIA bridge */
34*4882a593Smuzhiyun PCI_INTB_RTL8139, /* Ethernet controller with HUB (R2D-PLUS board) */
35*4882a593Smuzhiyun PCI_INTB_SLOT, /* PCI Slot 3.3v (R2D-1 board) */
36*4882a593Smuzhiyun PCI_INTA_SLOT, /* PCI Slot 3.3v */
37*4882a593Smuzhiyun TP, /* Touch Panel */
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #ifdef CONFIG_RTS7751R2D_1
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* Vectors for R2D-1 */
43*4882a593Smuzhiyun static struct intc_vect vectors_r2d_1[] __initdata = {
44*4882a593Smuzhiyun INTC_IRQ(EXT, IRQ_EXT),
45*4882a593Smuzhiyun INTC_IRQ(RTC_T, IRQ_RTC_T), INTC_IRQ(RTC_A, IRQ_RTC_A),
46*4882a593Smuzhiyun INTC_IRQ(AX88796, IRQ_AX88796), INTC_IRQ(SDCARD, IRQ_SDCARD),
47*4882a593Smuzhiyun INTC_IRQ(CF_CD, IRQ_CF_CD), INTC_IRQ(CF_IDE, IRQ_CF_IDE), /* ng */
48*4882a593Smuzhiyun INTC_IRQ(SM501, IRQ_VOYAGER),
49*4882a593Smuzhiyun INTC_IRQ(PCI_INTD_RTL8139, IRQ_PCI_INTD),
50*4882a593Smuzhiyun INTC_IRQ(PCI_INTC_PCI1520, IRQ_PCI_INTC),
51*4882a593Smuzhiyun INTC_IRQ(PCI_INTB_SLOT, IRQ_PCI_INTB),
52*4882a593Smuzhiyun INTC_IRQ(PCI_INTA_SLOT, IRQ_PCI_INTA),
53*4882a593Smuzhiyun INTC_IRQ(TP, IRQ_TP),
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* IRLMSK mask register layout for R2D-1 */
57*4882a593Smuzhiyun static struct intc_mask_reg mask_registers_r2d_1[] __initdata = {
58*4882a593Smuzhiyun { 0xa4000000, 0, 16, /* IRLMSK */
59*4882a593Smuzhiyun { TP, PCI_INTA_SLOT, PCI_INTB_SLOT,
60*4882a593Smuzhiyun PCI_INTC_PCI1520, PCI_INTD_RTL8139,
61*4882a593Smuzhiyun SM501, CF_IDE, CF_CD, SDCARD, AX88796,
62*4882a593Smuzhiyun RTC_A, RTC_T, 0, 0, 0, EXT } },
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /* IRLn to IRQ table for R2D-1 */
66*4882a593Smuzhiyun static unsigned char irl2irq_r2d_1[R2D_NR_IRL] __initdata = {
67*4882a593Smuzhiyun IRQ_PCI_INTD, IRQ_CF_IDE, IRQ_CF_CD, IRQ_PCI_INTC,
68*4882a593Smuzhiyun IRQ_VOYAGER, IRQ_AX88796, IRQ_RTC_A, IRQ_RTC_T,
69*4882a593Smuzhiyun IRQ_SDCARD, IRQ_PCI_INTA, IRQ_PCI_INTB, IRQ_EXT,
70*4882a593Smuzhiyun IRQ_TP,
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1,
74*4882a593Smuzhiyun NULL, mask_registers_r2d_1, NULL, NULL);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun #endif /* CONFIG_RTS7751R2D_1 */
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun #ifdef CONFIG_RTS7751R2D_PLUS
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* Vectors for R2D-PLUS */
81*4882a593Smuzhiyun static struct intc_vect vectors_r2d_plus[] __initdata = {
82*4882a593Smuzhiyun INTC_IRQ(EXT, IRQ_EXT),
83*4882a593Smuzhiyun INTC_IRQ(RTC_T, IRQ_RTC_T), INTC_IRQ(RTC_A, IRQ_RTC_A),
84*4882a593Smuzhiyun INTC_IRQ(KEY, IRQ_KEY), INTC_IRQ(SDCARD, IRQ_SDCARD),
85*4882a593Smuzhiyun INTC_IRQ(CF_CD, IRQ_CF_CD), INTC_IRQ(CF_IDE, IRQ_CF_IDE),
86*4882a593Smuzhiyun INTC_IRQ(SM501, IRQ_VOYAGER),
87*4882a593Smuzhiyun INTC_IRQ(PCI_INTD_RTL8139, IRQ_PCI_INTD),
88*4882a593Smuzhiyun INTC_IRQ(PCI_INTC_PCI1520, IRQ_PCI_INTC),
89*4882a593Smuzhiyun INTC_IRQ(PCI_INTB_RTL8139, IRQ_PCI_INTB),
90*4882a593Smuzhiyun INTC_IRQ(PCI_INTA_SLOT, IRQ_PCI_INTA),
91*4882a593Smuzhiyun INTC_IRQ(TP, IRQ_TP),
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* IRLMSK mask register layout for R2D-PLUS */
95*4882a593Smuzhiyun static struct intc_mask_reg mask_registers_r2d_plus[] __initdata = {
96*4882a593Smuzhiyun { 0xa4000000, 0, 16, /* IRLMSK */
97*4882a593Smuzhiyun { TP, PCI_INTA_SLOT, PCI_INTB_RTL8139,
98*4882a593Smuzhiyun PCI_INTC_PCI1520, PCI_INTD_RTL8139,
99*4882a593Smuzhiyun SM501, CF_IDE, CF_CD, SDCARD, KEY,
100*4882a593Smuzhiyun RTC_A, RTC_T, 0, 0, 0, EXT } },
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* IRLn to IRQ table for R2D-PLUS */
104*4882a593Smuzhiyun static unsigned char irl2irq_r2d_plus[R2D_NR_IRL] __initdata = {
105*4882a593Smuzhiyun IRQ_PCI_INTD, IRQ_CF_IDE, IRQ_CF_CD, IRQ_PCI_INTC,
106*4882a593Smuzhiyun IRQ_VOYAGER, IRQ_KEY, IRQ_RTC_A, IRQ_RTC_T,
107*4882a593Smuzhiyun IRQ_SDCARD, IRQ_PCI_INTA, IRQ_PCI_INTB, IRQ_EXT,
108*4882a593Smuzhiyun IRQ_TP,
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus,
112*4882a593Smuzhiyun NULL, mask_registers_r2d_plus, NULL, NULL);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun #endif /* CONFIG_RTS7751R2D_PLUS */
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static unsigned char irl2irq[R2D_NR_IRL];
117*4882a593Smuzhiyun
rts7751r2d_irq_demux(int irq)118*4882a593Smuzhiyun int rts7751r2d_irq_demux(int irq)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun if (irq >= R2D_NR_IRL || irq < 0 || !irl2irq[irq])
121*4882a593Smuzhiyun return irq;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun return irl2irq[irq];
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /*
127*4882a593Smuzhiyun * Initialize IRQ setting
128*4882a593Smuzhiyun */
init_rts7751r2d_IRQ(void)129*4882a593Smuzhiyun void __init init_rts7751r2d_IRQ(void)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun struct intc_desc *d;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun switch (__raw_readw(PA_VERREG) & 0xf0) {
134*4882a593Smuzhiyun #ifdef CONFIG_RTS7751R2D_PLUS
135*4882a593Smuzhiyun case 0x10:
136*4882a593Smuzhiyun printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
137*4882a593Smuzhiyun d = &intc_desc_r2d_plus;
138*4882a593Smuzhiyun memcpy(irl2irq, irl2irq_r2d_plus, R2D_NR_IRL);
139*4882a593Smuzhiyun break;
140*4882a593Smuzhiyun #endif
141*4882a593Smuzhiyun #ifdef CONFIG_RTS7751R2D_1
142*4882a593Smuzhiyun case 0x00: /* according to manual */
143*4882a593Smuzhiyun case 0x30: /* in reality */
144*4882a593Smuzhiyun printk(KERN_INFO "Using R2D-1 interrupt controller.\n");
145*4882a593Smuzhiyun d = &intc_desc_r2d_1;
146*4882a593Smuzhiyun memcpy(irl2irq, irl2irq_r2d_1, R2D_NR_IRL);
147*4882a593Smuzhiyun break;
148*4882a593Smuzhiyun #endif
149*4882a593Smuzhiyun default:
150*4882a593Smuzhiyun printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
151*4882a593Smuzhiyun __raw_readw(PA_VERREG));
152*4882a593Smuzhiyun return;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun register_intc_controller(d);
156*4882a593Smuzhiyun }
157