xref: /OK3568_Linux_fs/kernel/arch/sh/boards/mach-microdev/irq.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * arch/sh/boards/superh/microdev/irq.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SuperH SH4-202 MicroDev board support.
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/irq.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun #include <mach/microdev.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define NUM_EXTERNAL_IRQS 16	/* IRL0 .. IRL15 */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun static const struct {
19*4882a593Smuzhiyun 	unsigned char fpgaIrq;
20*4882a593Smuzhiyun 	unsigned char mapped;
21*4882a593Smuzhiyun 	const char *name;
22*4882a593Smuzhiyun } fpgaIrqTable[NUM_EXTERNAL_IRQS] = {
23*4882a593Smuzhiyun 	{ 0,				0,	"unused"   },		/* IRQ #0	IRL=15	0x200  */
24*4882a593Smuzhiyun 	{ MICRODEV_FPGA_IRQ_KEYBOARD,	1,	"keyboard" },		/* IRQ #1	IRL=14	0x220  */
25*4882a593Smuzhiyun 	{ MICRODEV_FPGA_IRQ_SERIAL1,	1,	"Serial #1"},		/* IRQ #2	IRL=13	0x240  */
26*4882a593Smuzhiyun 	{ MICRODEV_FPGA_IRQ_ETHERNET,	1,	"Ethernet" },		/* IRQ #3	IRL=12	0x260  */
27*4882a593Smuzhiyun 	{ MICRODEV_FPGA_IRQ_SERIAL2,	0,	"Serial #2"},		/* IRQ #4	IRL=11	0x280  */
28*4882a593Smuzhiyun 	{ 0,				0,	"unused"   },		/* IRQ #5	IRL=10	0x2a0  */
29*4882a593Smuzhiyun 	{ 0,				0,	"unused"   },		/* IRQ #6	IRL=9	0x2c0  */
30*4882a593Smuzhiyun 	{ MICRODEV_FPGA_IRQ_USB_HC,	1,	"USB"	   },		/* IRQ #7	IRL=8	0x2e0  */
31*4882a593Smuzhiyun 	{ MICRODEV_IRQ_PCI_INTA,	1,	"PCI INTA" },		/* IRQ #8	IRL=7	0x300  */
32*4882a593Smuzhiyun 	{ MICRODEV_IRQ_PCI_INTB,	1,	"PCI INTB" },		/* IRQ #9	IRL=6	0x320  */
33*4882a593Smuzhiyun 	{ MICRODEV_IRQ_PCI_INTC,	1,	"PCI INTC" },		/* IRQ #10	IRL=5	0x340  */
34*4882a593Smuzhiyun 	{ MICRODEV_IRQ_PCI_INTD,	1,	"PCI INTD" },		/* IRQ #11	IRL=4	0x360  */
35*4882a593Smuzhiyun 	{ MICRODEV_FPGA_IRQ_MOUSE,	1,	"mouse"    },		/* IRQ #12	IRL=3	0x380  */
36*4882a593Smuzhiyun 	{ MICRODEV_FPGA_IRQ_IDE2,	1,	"IDE #2"   },		/* IRQ #13	IRL=2	0x3a0  */
37*4882a593Smuzhiyun 	{ MICRODEV_FPGA_IRQ_IDE1,	1,	"IDE #1"   },		/* IRQ #14	IRL=1	0x3c0  */
38*4882a593Smuzhiyun 	{ 0,				0,	"unused"   },		/* IRQ #15	IRL=0	0x3e0  */
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #if (MICRODEV_LINUX_IRQ_KEYBOARD != 1)
42*4882a593Smuzhiyun #  error Inconsistancy in defining the IRQ# for Keyboard!
43*4882a593Smuzhiyun #endif
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #if (MICRODEV_LINUX_IRQ_ETHERNET != 3)
46*4882a593Smuzhiyun #  error Inconsistancy in defining the IRQ# for Ethernet!
47*4882a593Smuzhiyun #endif
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #if (MICRODEV_LINUX_IRQ_USB_HC != 7)
50*4882a593Smuzhiyun #  error Inconsistancy in defining the IRQ# for USB!
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #if (MICRODEV_LINUX_IRQ_MOUSE != 12)
54*4882a593Smuzhiyun #  error Inconsistancy in defining the IRQ# for PS/2 Mouse!
55*4882a593Smuzhiyun #endif
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #if (MICRODEV_LINUX_IRQ_IDE2 != 13)
58*4882a593Smuzhiyun #  error Inconsistancy in defining the IRQ# for secondary IDE!
59*4882a593Smuzhiyun #endif
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #if (MICRODEV_LINUX_IRQ_IDE1 != 14)
62*4882a593Smuzhiyun #  error Inconsistancy in defining the IRQ# for primary IDE!
63*4882a593Smuzhiyun #endif
64*4882a593Smuzhiyun 
disable_microdev_irq(struct irq_data * data)65*4882a593Smuzhiyun static void disable_microdev_irq(struct irq_data *data)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	unsigned int irq = data->irq;
68*4882a593Smuzhiyun 	unsigned int fpgaIrq;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	if (irq >= NUM_EXTERNAL_IRQS)
71*4882a593Smuzhiyun 		return;
72*4882a593Smuzhiyun 	if (!fpgaIrqTable[irq].mapped)
73*4882a593Smuzhiyun 		return;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	/* disable interrupts on the FPGA INTC register */
78*4882a593Smuzhiyun 	__raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
enable_microdev_irq(struct irq_data * data)81*4882a593Smuzhiyun static void enable_microdev_irq(struct irq_data *data)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	unsigned int irq = data->irq;
84*4882a593Smuzhiyun 	unsigned long priorityReg, priorities, pri;
85*4882a593Smuzhiyun 	unsigned int fpgaIrq;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	if (unlikely(irq >= NUM_EXTERNAL_IRQS))
88*4882a593Smuzhiyun 		return;
89*4882a593Smuzhiyun 	if (unlikely(!fpgaIrqTable[irq].mapped))
90*4882a593Smuzhiyun 		return;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	pri = 15 - irq;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
95*4882a593Smuzhiyun 	priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	/* set priority for the interrupt */
98*4882a593Smuzhiyun 	priorities = __raw_readl(priorityReg);
99*4882a593Smuzhiyun 	priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
100*4882a593Smuzhiyun 	priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
101*4882a593Smuzhiyun 	__raw_writel(priorities, priorityReg);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	/* enable interrupts on the FPGA INTC register */
104*4882a593Smuzhiyun 	__raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun static struct irq_chip microdev_irq_type = {
108*4882a593Smuzhiyun 	.name = "MicroDev-IRQ",
109*4882a593Smuzhiyun 	.irq_unmask = enable_microdev_irq,
110*4882a593Smuzhiyun 	.irq_mask = disable_microdev_irq,
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun /* This function sets the desired irq handler to be a MicroDev type */
make_microdev_irq(unsigned int irq)114*4882a593Smuzhiyun static void __init make_microdev_irq(unsigned int irq)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	disable_irq_nosync(irq);
117*4882a593Smuzhiyun 	irq_set_chip_and_handler(irq, &microdev_irq_type, handle_level_irq);
118*4882a593Smuzhiyun 	disable_microdev_irq(irq_get_irq_data(irq));
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun 
init_microdev_irq(void)121*4882a593Smuzhiyun extern void __init init_microdev_irq(void)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	int i;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	/* disable interrupts on the FPGA INTC register */
126*4882a593Smuzhiyun 	__raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
129*4882a593Smuzhiyun 		make_microdev_irq(i);
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
microdev_print_fpga_intc_status(void)132*4882a593Smuzhiyun extern void microdev_print_fpga_intc_status(void)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	volatile unsigned int * const intenb = (unsigned int*)MICRODEV_FPGA_INTENB_REG;
135*4882a593Smuzhiyun 	volatile unsigned int * const intdsb = (unsigned int*)MICRODEV_FPGA_INTDSB_REG;
136*4882a593Smuzhiyun 	volatile unsigned int * const intpria = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(0);
137*4882a593Smuzhiyun 	volatile unsigned int * const intprib = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(8);
138*4882a593Smuzhiyun 	volatile unsigned int * const intpric = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(16);
139*4882a593Smuzhiyun 	volatile unsigned int * const intprid = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(24);
140*4882a593Smuzhiyun 	volatile unsigned int * const intsrc = (unsigned int*)MICRODEV_FPGA_INTSRC_REG;
141*4882a593Smuzhiyun 	volatile unsigned int * const intreq = (unsigned int*)MICRODEV_FPGA_INTREQ_REG;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	printk("-------------------------- microdev_print_fpga_intc_status() ------------------\n");
144*4882a593Smuzhiyun 	printk("FPGA_INTENB = 0x%08x\n", *intenb);
145*4882a593Smuzhiyun 	printk("FPGA_INTDSB = 0x%08x\n", *intdsb);
146*4882a593Smuzhiyun 	printk("FPGA_INTSRC = 0x%08x\n", *intsrc);
147*4882a593Smuzhiyun 	printk("FPGA_INTREQ = 0x%08x\n", *intreq);
148*4882a593Smuzhiyun 	printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria);
149*4882a593Smuzhiyun 	printk("-------------------------------------------------------------------------------\n");
150*4882a593Smuzhiyun }
151