1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * arch/sh/boards/renesas/r7780rp/setup.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Renesas Solutions Highlander Support.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
8*4882a593Smuzhiyun * Copyright (C) 2005 - 2008 Paul Mundt
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This contains support for the R7780RP-1, R7780MP, and R7785RP
11*4882a593Smuzhiyun * Highlander modules.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/io.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/ata_platform.h>
17*4882a593Smuzhiyun #include <linux/types.h>
18*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
19*4882a593Smuzhiyun #include <linux/i2c.h>
20*4882a593Smuzhiyun #include <linux/irq.h>
21*4882a593Smuzhiyun #include <linux/interrupt.h>
22*4882a593Smuzhiyun #include <linux/usb/r8a66597.h>
23*4882a593Smuzhiyun #include <linux/usb/m66592.h>
24*4882a593Smuzhiyun #include <linux/clkdev.h>
25*4882a593Smuzhiyun #include <net/ax88796.h>
26*4882a593Smuzhiyun #include <asm/machvec.h>
27*4882a593Smuzhiyun #include <mach/highlander.h>
28*4882a593Smuzhiyun #include <asm/clock.h>
29*4882a593Smuzhiyun #include <asm/heartbeat.h>
30*4882a593Smuzhiyun #include <asm/io.h>
31*4882a593Smuzhiyun #include <asm/io_trapped.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static struct r8a66597_platdata r8a66597_data = {
34*4882a593Smuzhiyun .xtal = R8A66597_PLATDATA_XTAL_12MHZ,
35*4882a593Smuzhiyun .vif = 1,
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static struct resource r8a66597_usb_host_resources[] = {
39*4882a593Smuzhiyun [0] = {
40*4882a593Smuzhiyun .start = 0xA4200000,
41*4882a593Smuzhiyun .end = 0xA42000FF,
42*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
43*4882a593Smuzhiyun },
44*4882a593Smuzhiyun [1] = {
45*4882a593Smuzhiyun .start = IRQ_EXT1, /* irq number */
46*4882a593Smuzhiyun .end = IRQ_EXT1,
47*4882a593Smuzhiyun .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
48*4882a593Smuzhiyun },
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun static struct platform_device r8a66597_usb_host_device = {
52*4882a593Smuzhiyun .name = "r8a66597_hcd",
53*4882a593Smuzhiyun .id = -1,
54*4882a593Smuzhiyun .dev = {
55*4882a593Smuzhiyun .dma_mask = NULL, /* don't use dma */
56*4882a593Smuzhiyun .coherent_dma_mask = 0xffffffff,
57*4882a593Smuzhiyun .platform_data = &r8a66597_data,
58*4882a593Smuzhiyun },
59*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
60*4882a593Smuzhiyun .resource = r8a66597_usb_host_resources,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static struct m66592_platdata usbf_platdata = {
64*4882a593Smuzhiyun .xtal = M66592_PLATDATA_XTAL_24MHZ,
65*4882a593Smuzhiyun .vif = 1,
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static struct resource m66592_usb_peripheral_resources[] = {
69*4882a593Smuzhiyun [0] = {
70*4882a593Smuzhiyun .name = "m66592_udc",
71*4882a593Smuzhiyun .start = 0xb0000000,
72*4882a593Smuzhiyun .end = 0xb00000FF,
73*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
74*4882a593Smuzhiyun },
75*4882a593Smuzhiyun [1] = {
76*4882a593Smuzhiyun .name = "m66592_udc",
77*4882a593Smuzhiyun .start = IRQ_EXT4, /* irq number */
78*4882a593Smuzhiyun .end = IRQ_EXT4,
79*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
80*4882a593Smuzhiyun },
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static struct platform_device m66592_usb_peripheral_device = {
84*4882a593Smuzhiyun .name = "m66592_udc",
85*4882a593Smuzhiyun .id = -1,
86*4882a593Smuzhiyun .dev = {
87*4882a593Smuzhiyun .dma_mask = NULL, /* don't use dma */
88*4882a593Smuzhiyun .coherent_dma_mask = 0xffffffff,
89*4882a593Smuzhiyun .platform_data = &usbf_platdata,
90*4882a593Smuzhiyun },
91*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources),
92*4882a593Smuzhiyun .resource = m66592_usb_peripheral_resources,
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static struct resource cf_ide_resources[] = {
96*4882a593Smuzhiyun [0] = {
97*4882a593Smuzhiyun .start = PA_AREA5_IO + 0x1000,
98*4882a593Smuzhiyun .end = PA_AREA5_IO + 0x1000 + 0x08 - 1,
99*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
100*4882a593Smuzhiyun },
101*4882a593Smuzhiyun [1] = {
102*4882a593Smuzhiyun .start = PA_AREA5_IO + 0x80c,
103*4882a593Smuzhiyun .end = PA_AREA5_IO + 0x80c + 0x16 - 1,
104*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
105*4882a593Smuzhiyun },
106*4882a593Smuzhiyun [2] = {
107*4882a593Smuzhiyun .start = IRQ_CF,
108*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
109*4882a593Smuzhiyun },
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun static struct pata_platform_info pata_info = {
113*4882a593Smuzhiyun .ioport_shift = 1,
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static struct platform_device cf_ide_device = {
117*4882a593Smuzhiyun .name = "pata_platform",
118*4882a593Smuzhiyun .id = -1,
119*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(cf_ide_resources),
120*4882a593Smuzhiyun .resource = cf_ide_resources,
121*4882a593Smuzhiyun .dev = {
122*4882a593Smuzhiyun .platform_data = &pata_info,
123*4882a593Smuzhiyun },
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun static struct resource heartbeat_resources[] = {
127*4882a593Smuzhiyun [0] = {
128*4882a593Smuzhiyun .start = PA_OBLED,
129*4882a593Smuzhiyun .end = PA_OBLED,
130*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
131*4882a593Smuzhiyun },
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun #ifndef CONFIG_SH_R7785RP
135*4882a593Smuzhiyun static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 };
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun static struct heartbeat_data heartbeat_data = {
138*4882a593Smuzhiyun .bit_pos = heartbeat_bit_pos,
139*4882a593Smuzhiyun .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun #endif
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun static struct platform_device heartbeat_device = {
144*4882a593Smuzhiyun .name = "heartbeat",
145*4882a593Smuzhiyun .id = -1,
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* R7785RP has a slightly more sensible FPGA.. */
148*4882a593Smuzhiyun #ifndef CONFIG_SH_R7785RP
149*4882a593Smuzhiyun .dev = {
150*4882a593Smuzhiyun .platform_data = &heartbeat_data,
151*4882a593Smuzhiyun },
152*4882a593Smuzhiyun #endif
153*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(heartbeat_resources),
154*4882a593Smuzhiyun .resource = heartbeat_resources,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun static struct ax_plat_data ax88796_platdata = {
158*4882a593Smuzhiyun .flags = AXFLG_HAS_93CX6,
159*4882a593Smuzhiyun .wordlength = 2,
160*4882a593Smuzhiyun .dcr_val = 0x1,
161*4882a593Smuzhiyun .rcr_val = 0x40,
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun static struct resource ax88796_resources[] = {
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun #ifdef CONFIG_SH_R7780RP
167*4882a593Smuzhiyun .start = 0xa5800400,
168*4882a593Smuzhiyun .end = 0xa5800400 + (0x20 * 0x2) - 1,
169*4882a593Smuzhiyun #else
170*4882a593Smuzhiyun .start = 0xa4100400,
171*4882a593Smuzhiyun .end = 0xa4100400 + (0x20 * 0x2) - 1,
172*4882a593Smuzhiyun #endif
173*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
174*4882a593Smuzhiyun },
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun .start = IRQ_AX88796,
177*4882a593Smuzhiyun .end = IRQ_AX88796,
178*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
179*4882a593Smuzhiyun },
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun static struct platform_device ax88796_device = {
183*4882a593Smuzhiyun .name = "ax88796",
184*4882a593Smuzhiyun .id = 0,
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun .dev = {
187*4882a593Smuzhiyun .platform_data = &ax88796_platdata,
188*4882a593Smuzhiyun },
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(ax88796_resources),
191*4882a593Smuzhiyun .resource = ax88796_resources,
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun static struct mtd_partition nor_flash_partitions[] = {
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun .name = "loader",
197*4882a593Smuzhiyun .offset = 0x00000000,
198*4882a593Smuzhiyun .size = 512 * 1024,
199*4882a593Smuzhiyun },
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun .name = "bootenv",
202*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
203*4882a593Smuzhiyun .size = 512 * 1024,
204*4882a593Smuzhiyun },
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun .name = "kernel",
207*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
208*4882a593Smuzhiyun .size = 4 * 1024 * 1024,
209*4882a593Smuzhiyun },
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun .name = "data",
212*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
213*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL,
214*4882a593Smuzhiyun },
215*4882a593Smuzhiyun };
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun static struct physmap_flash_data nor_flash_data = {
218*4882a593Smuzhiyun .width = 4,
219*4882a593Smuzhiyun .parts = nor_flash_partitions,
220*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(nor_flash_partitions),
221*4882a593Smuzhiyun };
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /* This config is flash board for mass production. */
224*4882a593Smuzhiyun static struct resource nor_flash_resources[] = {
225*4882a593Smuzhiyun [0] = {
226*4882a593Smuzhiyun .start = PA_NORFLASH_ADDR,
227*4882a593Smuzhiyun .end = PA_NORFLASH_ADDR + PA_NORFLASH_SIZE - 1,
228*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun static struct platform_device nor_flash_device = {
233*4882a593Smuzhiyun .name = "physmap-flash",
234*4882a593Smuzhiyun .dev = {
235*4882a593Smuzhiyun .platform_data = &nor_flash_data,
236*4882a593Smuzhiyun },
237*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(nor_flash_resources),
238*4882a593Smuzhiyun .resource = nor_flash_resources,
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun static struct resource smbus_resources[] = {
242*4882a593Smuzhiyun [0] = {
243*4882a593Smuzhiyun .start = PA_SMCR,
244*4882a593Smuzhiyun .end = PA_SMCR + 0x100 - 1,
245*4882a593Smuzhiyun .flags = IORESOURCE_MEM,
246*4882a593Smuzhiyun },
247*4882a593Smuzhiyun [1] = {
248*4882a593Smuzhiyun .start = IRQ_SMBUS,
249*4882a593Smuzhiyun .end = IRQ_SMBUS,
250*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
251*4882a593Smuzhiyun },
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun static struct platform_device smbus_device = {
255*4882a593Smuzhiyun .name = "i2c-highlander",
256*4882a593Smuzhiyun .id = 0,
257*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(smbus_resources),
258*4882a593Smuzhiyun .resource = smbus_resources,
259*4882a593Smuzhiyun };
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun static struct i2c_board_info __initdata highlander_i2c_devices[] = {
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun I2C_BOARD_INFO("r2025sd", 0x32),
264*4882a593Smuzhiyun },
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun static struct platform_device *r7780rp_devices[] __initdata = {
268*4882a593Smuzhiyun &r8a66597_usb_host_device,
269*4882a593Smuzhiyun &m66592_usb_peripheral_device,
270*4882a593Smuzhiyun &heartbeat_device,
271*4882a593Smuzhiyun &smbus_device,
272*4882a593Smuzhiyun &nor_flash_device,
273*4882a593Smuzhiyun #ifndef CONFIG_SH_R7780RP
274*4882a593Smuzhiyun &ax88796_device,
275*4882a593Smuzhiyun #endif
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun /*
279*4882a593Smuzhiyun * The CF is connected using a 16-bit bus where 8-bit operations are
280*4882a593Smuzhiyun * unsupported. The linux ata driver is however using 8-bit operations, so
281*4882a593Smuzhiyun * insert a trapped io filter to convert 8-bit operations into 16-bit.
282*4882a593Smuzhiyun */
283*4882a593Smuzhiyun static struct trapped_io cf_trapped_io = {
284*4882a593Smuzhiyun .resource = cf_ide_resources,
285*4882a593Smuzhiyun .num_resources = 2,
286*4882a593Smuzhiyun .minimum_bus_width = 16,
287*4882a593Smuzhiyun };
288*4882a593Smuzhiyun
r7780rp_devices_setup(void)289*4882a593Smuzhiyun static int __init r7780rp_devices_setup(void)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun int ret = 0;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun #ifndef CONFIG_SH_R7780RP
294*4882a593Smuzhiyun if (register_trapped_io(&cf_trapped_io) == 0)
295*4882a593Smuzhiyun ret |= platform_device_register(&cf_ide_device);
296*4882a593Smuzhiyun #endif
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun ret |= platform_add_devices(r7780rp_devices,
299*4882a593Smuzhiyun ARRAY_SIZE(r7780rp_devices));
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun ret |= i2c_register_board_info(0, highlander_i2c_devices,
302*4882a593Smuzhiyun ARRAY_SIZE(highlander_i2c_devices));
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun return ret;
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun device_initcall(r7780rp_devices_setup);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /*
309*4882a593Smuzhiyun * Platform specific clocks
310*4882a593Smuzhiyun */
ivdr_clk_enable(struct clk * clk)311*4882a593Smuzhiyun static int ivdr_clk_enable(struct clk *clk)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
314*4882a593Smuzhiyun return 0;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
ivdr_clk_disable(struct clk * clk)317*4882a593Smuzhiyun static void ivdr_clk_disable(struct clk *clk)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun static struct sh_clk_ops ivdr_clk_ops = {
323*4882a593Smuzhiyun .enable = ivdr_clk_enable,
324*4882a593Smuzhiyun .disable = ivdr_clk_disable,
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun static struct clk ivdr_clk = {
328*4882a593Smuzhiyun .ops = &ivdr_clk_ops,
329*4882a593Smuzhiyun };
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun static struct clk *r7780rp_clocks[] = {
332*4882a593Smuzhiyun &ivdr_clk,
333*4882a593Smuzhiyun };
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun static struct clk_lookup lookups[] = {
336*4882a593Smuzhiyun /* main clocks */
337*4882a593Smuzhiyun CLKDEV_CON_ID("ivdr_clk", &ivdr_clk),
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun
r7780rp_power_off(void)340*4882a593Smuzhiyun static void r7780rp_power_off(void)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun if (mach_is_r7780mp() || mach_is_r7785rp())
343*4882a593Smuzhiyun __raw_writew(0x0001, PA_POFF);
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /*
347*4882a593Smuzhiyun * Initialize the board
348*4882a593Smuzhiyun */
highlander_setup(char ** cmdline_p)349*4882a593Smuzhiyun static void __init highlander_setup(char **cmdline_p)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun u16 ver = __raw_readw(PA_VERREG);
352*4882a593Smuzhiyun int i;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun printk(KERN_INFO "Renesas Solutions Highlander %s support.\n",
355*4882a593Smuzhiyun mach_is_r7780rp() ? "R7780RP-1" :
356*4882a593Smuzhiyun mach_is_r7780mp() ? "R7780MP" :
357*4882a593Smuzhiyun "R7785RP");
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun printk(KERN_INFO "Board version: %d (revision %d), "
360*4882a593Smuzhiyun "FPGA version: %d (revision %d)\n",
361*4882a593Smuzhiyun (ver >> 12) & 0xf, (ver >> 8) & 0xf,
362*4882a593Smuzhiyun (ver >> 4) & 0xf, ver & 0xf);
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun highlander_plat_pinmux_setup();
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun /*
367*4882a593Smuzhiyun * Enable the important clocks right away..
368*4882a593Smuzhiyun */
369*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(r7780rp_clocks); i++) {
370*4882a593Smuzhiyun struct clk *clk = r7780rp_clocks[i];
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun clk_register(clk);
373*4882a593Smuzhiyun clk_enable(clk);
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun clkdev_add_table(lookups, ARRAY_SIZE(lookups));
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun __raw_writew(0x0000, PA_OBLED); /* Clear LED. */
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun if (mach_is_r7780rp())
381*4882a593Smuzhiyun __raw_writew(0x0001, PA_SDPOW); /* SD Power ON */
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun pm_power_off = r7780rp_power_off;
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun static unsigned char irl2irq[HL_NR_IRL];
389*4882a593Smuzhiyun
highlander_irq_demux(int irq)390*4882a593Smuzhiyun static int highlander_irq_demux(int irq)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun if (irq >= HL_NR_IRL || irq < 0 || !irl2irq[irq])
393*4882a593Smuzhiyun return irq;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun return irl2irq[irq];
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
highlander_init_irq(void)398*4882a593Smuzhiyun static void __init highlander_init_irq(void)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun unsigned char *ucp = highlander_plat_irq_setup();
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun if (ucp) {
403*4882a593Smuzhiyun plat_irq_setup_pins(IRQ_MODE_IRL3210);
404*4882a593Smuzhiyun memcpy(irl2irq, ucp, HL_NR_IRL);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun /*
409*4882a593Smuzhiyun * The Machine Vector
410*4882a593Smuzhiyun */
411*4882a593Smuzhiyun static struct sh_machine_vector mv_highlander __initmv = {
412*4882a593Smuzhiyun .mv_name = "Highlander",
413*4882a593Smuzhiyun .mv_setup = highlander_setup,
414*4882a593Smuzhiyun .mv_init_irq = highlander_init_irq,
415*4882a593Smuzhiyun .mv_irq_demux = highlander_irq_demux,
416*4882a593Smuzhiyun };
417