1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/sh/boards/shmin/setup.c 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2006 Takashi YOSHII 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SHMIN Support. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #include <linux/init.h> 10*4882a593Smuzhiyun #include <linux/irq.h> 11*4882a593Smuzhiyun #include <asm/machvec.h> 12*4882a593Smuzhiyun #include <mach/shmin.h> 13*4882a593Smuzhiyun #include <asm/clock.h> 14*4882a593Smuzhiyun #include <asm/io.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define PFC_PHCR 0xa400010eUL 17*4882a593Smuzhiyun #define INTC_ICR1 0xa4000010UL 18*4882a593Smuzhiyun init_shmin_irq(void)19*4882a593Smuzhiyunstatic void __init init_shmin_irq(void) 20*4882a593Smuzhiyun { 21*4882a593Smuzhiyun __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ 22*4882a593Smuzhiyun __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. 23*4882a593Smuzhiyun plat_irq_setup_pins(IRQ_MODE_IRQ); 24*4882a593Smuzhiyun } 25*4882a593Smuzhiyun shmin_setup(char ** cmdline_p)26*4882a593Smuzhiyunstatic void __init shmin_setup(char **cmdline_p) 27*4882a593Smuzhiyun { 28*4882a593Smuzhiyun __set_io_port_base(SHMIN_IO_BASE); 29*4882a593Smuzhiyun } 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun static struct sh_machine_vector mv_shmin __initmv = { 32*4882a593Smuzhiyun .mv_name = "SHMIN", 33*4882a593Smuzhiyun .mv_setup = shmin_setup, 34*4882a593Smuzhiyun .mv_init_irq = init_shmin_irq, 35*4882a593Smuzhiyun }; 36