xref: /OK3568_Linux_fs/kernel/arch/sh/boards/board-edosk7760.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Renesas Europe EDOSK7760 Board Support
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2008 SPES Societa' Progettazione Elettronica e Software Ltd.
6*4882a593Smuzhiyun  * Author: Luca Santini <luca.santini@spesonline.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun #include <linux/init.h>
9*4882a593Smuzhiyun #include <linux/types.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/smc91x.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/sh_intc.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
16*4882a593Smuzhiyun #include <asm/machvec.h>
17*4882a593Smuzhiyun #include <asm/io.h>
18*4882a593Smuzhiyun #include <asm/addrspace.h>
19*4882a593Smuzhiyun #include <asm/delay.h>
20*4882a593Smuzhiyun #include <asm/i2c-sh7760.h>
21*4882a593Smuzhiyun #include <linux/sizes.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* Bus state controller registers for CS4 area */
24*4882a593Smuzhiyun #define BSC_CS4BCR	0xA4FD0010
25*4882a593Smuzhiyun #define BSC_CS4WCR	0xA4FD0030
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define SMC_IOBASE	0xA2000000
28*4882a593Smuzhiyun #define SMC_IO_OFFSET	0x300
29*4882a593Smuzhiyun #define SMC_IOADDR	(SMC_IOBASE + SMC_IO_OFFSET)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /* NOR flash */
32*4882a593Smuzhiyun static struct mtd_partition edosk7760_nor_flash_partitions[] = {
33*4882a593Smuzhiyun 	{
34*4882a593Smuzhiyun 		.name = "bootloader",
35*4882a593Smuzhiyun 		.offset = 0,
36*4882a593Smuzhiyun 		.size = SZ_256K,
37*4882a593Smuzhiyun 		.mask_flags = MTD_WRITEABLE,	/* Read-only */
38*4882a593Smuzhiyun 	}, {
39*4882a593Smuzhiyun 		.name = "kernel",
40*4882a593Smuzhiyun 		.offset = MTDPART_OFS_APPEND,
41*4882a593Smuzhiyun 		.size = SZ_2M,
42*4882a593Smuzhiyun 	}, {
43*4882a593Smuzhiyun 		.name = "fs",
44*4882a593Smuzhiyun 		.offset = MTDPART_OFS_APPEND,
45*4882a593Smuzhiyun 		.size = (26 << 20),
46*4882a593Smuzhiyun 	}, {
47*4882a593Smuzhiyun 		.name = "other",
48*4882a593Smuzhiyun 		.offset = MTDPART_OFS_APPEND,
49*4882a593Smuzhiyun 		.size = MTDPART_SIZ_FULL,
50*4882a593Smuzhiyun 	},
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun static struct physmap_flash_data edosk7760_nor_flash_data = {
54*4882a593Smuzhiyun 	.width		= 4,
55*4882a593Smuzhiyun 	.parts		= edosk7760_nor_flash_partitions,
56*4882a593Smuzhiyun 	.nr_parts	= ARRAY_SIZE(edosk7760_nor_flash_partitions),
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun static struct resource edosk7760_nor_flash_resources[] = {
60*4882a593Smuzhiyun 	[0] = {
61*4882a593Smuzhiyun 		.name	= "NOR Flash",
62*4882a593Smuzhiyun 		.start	= 0x00000000,
63*4882a593Smuzhiyun 		.end	= 0x00000000 + SZ_32M - 1,
64*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun static struct platform_device edosk7760_nor_flash_device = {
69*4882a593Smuzhiyun 	.name		= "physmap-flash",
70*4882a593Smuzhiyun 	.resource	= edosk7760_nor_flash_resources,
71*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(edosk7760_nor_flash_resources),
72*4882a593Smuzhiyun 	.dev		= {
73*4882a593Smuzhiyun 		.platform_data = &edosk7760_nor_flash_data,
74*4882a593Smuzhiyun 	},
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /* i2c initialization functions */
78*4882a593Smuzhiyun static struct sh7760_i2c_platdata i2c_pd = {
79*4882a593Smuzhiyun 	.speed_khz	= 400,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun static struct resource sh7760_i2c1_res[] = {
83*4882a593Smuzhiyun 	{
84*4882a593Smuzhiyun 		.start	= SH7760_I2C1_MMIO,
85*4882a593Smuzhiyun 		.end	= SH7760_I2C1_MMIOEND,
86*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
87*4882a593Smuzhiyun 	},{
88*4882a593Smuzhiyun 		.start	= evt2irq(0x9e0),
89*4882a593Smuzhiyun 		.end	= evt2irq(0x9e0),
90*4882a593Smuzhiyun 		.flags	= IORESOURCE_IRQ,
91*4882a593Smuzhiyun 	},
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun static struct platform_device sh7760_i2c1_dev = {
95*4882a593Smuzhiyun 	.dev    = {
96*4882a593Smuzhiyun 		.platform_data	= &i2c_pd,
97*4882a593Smuzhiyun 	},
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	.name		= SH7760_I2C_DEVNAME,
100*4882a593Smuzhiyun 	.id		= 1,
101*4882a593Smuzhiyun 	.resource	= sh7760_i2c1_res,
102*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(sh7760_i2c1_res),
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun static struct resource sh7760_i2c0_res[] = {
106*4882a593Smuzhiyun 	{
107*4882a593Smuzhiyun 		.start	= SH7760_I2C0_MMIO,
108*4882a593Smuzhiyun 		.end	= SH7760_I2C0_MMIOEND,
109*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
110*4882a593Smuzhiyun 	}, {
111*4882a593Smuzhiyun 		.start	= evt2irq(0x9c0),
112*4882a593Smuzhiyun 		.end	= evt2irq(0x9c0),
113*4882a593Smuzhiyun 		.flags	= IORESOURCE_IRQ,
114*4882a593Smuzhiyun 	},
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun static struct platform_device sh7760_i2c0_dev = {
118*4882a593Smuzhiyun 	.dev    = {
119*4882a593Smuzhiyun 		.platform_data	= &i2c_pd,
120*4882a593Smuzhiyun 	},
121*4882a593Smuzhiyun 	.name		= SH7760_I2C_DEVNAME,
122*4882a593Smuzhiyun 	.id		= 0,
123*4882a593Smuzhiyun 	.resource	= sh7760_i2c0_res,
124*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(sh7760_i2c0_res),
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun /* eth initialization functions */
128*4882a593Smuzhiyun static struct smc91x_platdata smc91x_info = {
129*4882a593Smuzhiyun 	.flags = SMC91X_USE_16BIT | SMC91X_IO_SHIFT_1 | IORESOURCE_IRQ_LOWLEVEL,
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun static struct resource smc91x_res[] = {
133*4882a593Smuzhiyun 	[0] = {
134*4882a593Smuzhiyun 		.start	= SMC_IOADDR,
135*4882a593Smuzhiyun 		.end	= SMC_IOADDR + SZ_32 - 1,
136*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
137*4882a593Smuzhiyun 	},
138*4882a593Smuzhiyun 	[1] = {
139*4882a593Smuzhiyun 		.start	= evt2irq(0x2a0),
140*4882a593Smuzhiyun 		.end	= evt2irq(0x2a0),
141*4882a593Smuzhiyun 		.flags	= IORESOURCE_IRQ ,
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun static struct platform_device smc91x_dev = {
146*4882a593Smuzhiyun 	.name		= "smc91x",
147*4882a593Smuzhiyun 	.id		= -1,
148*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(smc91x_res),
149*4882a593Smuzhiyun 	.resource	= smc91x_res,
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	.dev	= {
152*4882a593Smuzhiyun 		.platform_data	= &smc91x_info,
153*4882a593Smuzhiyun 	},
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun /* platform init code */
157*4882a593Smuzhiyun static struct platform_device *edosk7760_devices[] __initdata = {
158*4882a593Smuzhiyun 	&smc91x_dev,
159*4882a593Smuzhiyun 	&edosk7760_nor_flash_device,
160*4882a593Smuzhiyun 	&sh7760_i2c0_dev,
161*4882a593Smuzhiyun 	&sh7760_i2c1_dev,
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
init_edosk7760_devices(void)164*4882a593Smuzhiyun static int __init init_edosk7760_devices(void)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun 	plat_irq_setup_pins(IRQ_MODE_IRQ);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	return platform_add_devices(edosk7760_devices,
169*4882a593Smuzhiyun 				    ARRAY_SIZE(edosk7760_devices));
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun device_initcall(init_edosk7760_devices);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun /*
174*4882a593Smuzhiyun  * The Machine Vector
175*4882a593Smuzhiyun  */
176*4882a593Smuzhiyun struct sh_machine_vector mv_edosk7760 __initmv = {
177*4882a593Smuzhiyun 	.mv_name	= "EDOSK7760",
178*4882a593Smuzhiyun };
179