xref: /OK3568_Linux_fs/kernel/arch/sh/Kconfig.cpu (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyunmenu "Processor features"
3*4882a593Smuzhiyun
4*4882a593Smuzhiyunchoice
5*4882a593Smuzhiyun	prompt "Endianness selection"
6*4882a593Smuzhiyun	default CPU_LITTLE_ENDIAN
7*4882a593Smuzhiyun	help
8*4882a593Smuzhiyun	  Some SuperH machines can be configured for either little or big
9*4882a593Smuzhiyun	  endian byte order. These modes require different kernels.
10*4882a593Smuzhiyun
11*4882a593Smuzhiyunconfig CPU_LITTLE_ENDIAN
12*4882a593Smuzhiyun	bool "Little Endian"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyunconfig CPU_BIG_ENDIAN
15*4882a593Smuzhiyun	bool "Big Endian"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyunendchoice
18*4882a593Smuzhiyun
19*4882a593Smuzhiyunconfig SH_FPU
20*4882a593Smuzhiyun	def_bool y
21*4882a593Smuzhiyun	prompt "FPU support"
22*4882a593Smuzhiyun	depends on CPU_HAS_FPU
23*4882a593Smuzhiyun	help
24*4882a593Smuzhiyun	  Selecting this option will enable support for SH processors that
25*4882a593Smuzhiyun	  have FPU units (ie, SH77xx).
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	  This option must be set in order to enable the FPU.
28*4882a593Smuzhiyun
29*4882a593Smuzhiyunconfig SH_FPU_EMU
30*4882a593Smuzhiyun	def_bool n
31*4882a593Smuzhiyun	prompt "FPU emulation support"
32*4882a593Smuzhiyun	depends on !SH_FPU
33*4882a593Smuzhiyun	help
34*4882a593Smuzhiyun	  Selecting this option will enable support for software FPU emulation.
35*4882a593Smuzhiyun	  Most SH-3 users will want to say Y here, whereas most SH-4 users will
36*4882a593Smuzhiyun	  want to say N.
37*4882a593Smuzhiyun
38*4882a593Smuzhiyunconfig SH_DSP
39*4882a593Smuzhiyun	def_bool y
40*4882a593Smuzhiyun	prompt "DSP support"
41*4882a593Smuzhiyun	depends on CPU_HAS_DSP
42*4882a593Smuzhiyun	help
43*4882a593Smuzhiyun	  Selecting this option will enable support for SH processors that
44*4882a593Smuzhiyun	  have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	  This option must be set in order to enable the DSP.
47*4882a593Smuzhiyun
48*4882a593Smuzhiyunconfig SH_ADC
49*4882a593Smuzhiyun	def_bool y
50*4882a593Smuzhiyun	prompt "ADC support"
51*4882a593Smuzhiyun	depends on CPU_SH3
52*4882a593Smuzhiyun	help
53*4882a593Smuzhiyun	  Selecting this option will allow the Linux kernel to use SH3 on-chip
54*4882a593Smuzhiyun	  ADC module.
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	  If unsure, say N.
57*4882a593Smuzhiyun
58*4882a593Smuzhiyunconfig SH_STORE_QUEUES
59*4882a593Smuzhiyun	bool "Support for Store Queues"
60*4882a593Smuzhiyun	depends on CPU_SH4
61*4882a593Smuzhiyun	help
62*4882a593Smuzhiyun	  Selecting this option will enable an in-kernel API for manipulating
63*4882a593Smuzhiyun	  the store queues integrated in the SH-4 processors.
64*4882a593Smuzhiyun
65*4882a593Smuzhiyunconfig SPECULATIVE_EXECUTION
66*4882a593Smuzhiyun	bool "Speculative subroutine return"
67*4882a593Smuzhiyun	depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7786
68*4882a593Smuzhiyun	help
69*4882a593Smuzhiyun	  This enables support for a speculative instruction fetch for
70*4882a593Smuzhiyun	  subroutine return. There are various pitfalls associated with
71*4882a593Smuzhiyun	  this, as outlined in the SH7780 hardware manual.
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	  If unsure, say N.
74*4882a593Smuzhiyun
75*4882a593Smuzhiyunconfig CPU_HAS_INTEVT
76*4882a593Smuzhiyun	bool
77*4882a593Smuzhiyun
78*4882a593Smuzhiyunconfig CPU_HAS_IPR_IRQ
79*4882a593Smuzhiyun	bool
80*4882a593Smuzhiyun
81*4882a593Smuzhiyunconfig CPU_HAS_SR_RB
82*4882a593Smuzhiyun	bool
83*4882a593Smuzhiyun	help
84*4882a593Smuzhiyun	  This will enable the use of SR.RB register bank usage. Processors
85*4882a593Smuzhiyun	  that are lacking this bit must have another method in place for
86*4882a593Smuzhiyun	  accomplishing what is taken care of by the banked registers.
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun	  See <file:Documentation/sh/register-banks.rst> for further
89*4882a593Smuzhiyun	  information on SR.RB and register banking in the kernel in general.
90*4882a593Smuzhiyun
91*4882a593Smuzhiyunconfig CPU_HAS_PTEAEX
92*4882a593Smuzhiyun	bool
93*4882a593Smuzhiyun
94*4882a593Smuzhiyunconfig CPU_HAS_DSP
95*4882a593Smuzhiyun	bool
96*4882a593Smuzhiyun
97*4882a593Smuzhiyunconfig CPU_HAS_FPU
98*4882a593Smuzhiyun	bool
99*4882a593Smuzhiyun
100*4882a593Smuzhiyunendmenu
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