1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * S390 version 4*4882a593Smuzhiyun * Copyright IBM Corp. 1999, 2017 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun #ifndef _ASM_S390_SETUP_H 7*4882a593Smuzhiyun #define _ASM_S390_SETUP_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/bits.h> 10*4882a593Smuzhiyun #include <uapi/asm/setup.h> 11*4882a593Smuzhiyun #include <linux/build_bug.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define EP_OFFSET 0x10008 14*4882a593Smuzhiyun #define EP_STRING "S390EP" 15*4882a593Smuzhiyun #define PARMAREA 0x10400 16*4882a593Smuzhiyun #define EARLY_SCCB_OFFSET 0x11000 17*4882a593Smuzhiyun #define HEAD_END 0x12000 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define EARLY_SCCB_SIZE PAGE_SIZE 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* 22*4882a593Smuzhiyun * Machine features detected in early.c 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define MACHINE_FLAG_VM BIT(0) 26*4882a593Smuzhiyun #define MACHINE_FLAG_KVM BIT(1) 27*4882a593Smuzhiyun #define MACHINE_FLAG_LPAR BIT(2) 28*4882a593Smuzhiyun #define MACHINE_FLAG_DIAG9C BIT(3) 29*4882a593Smuzhiyun #define MACHINE_FLAG_ESOP BIT(4) 30*4882a593Smuzhiyun #define MACHINE_FLAG_IDTE BIT(5) 31*4882a593Smuzhiyun #define MACHINE_FLAG_EDAT1 BIT(7) 32*4882a593Smuzhiyun #define MACHINE_FLAG_EDAT2 BIT(8) 33*4882a593Smuzhiyun #define MACHINE_FLAG_TOPOLOGY BIT(10) 34*4882a593Smuzhiyun #define MACHINE_FLAG_TE BIT(11) 35*4882a593Smuzhiyun #define MACHINE_FLAG_TLB_LC BIT(12) 36*4882a593Smuzhiyun #define MACHINE_FLAG_VX BIT(13) 37*4882a593Smuzhiyun #define MACHINE_FLAG_TLB_GUEST BIT(14) 38*4882a593Smuzhiyun #define MACHINE_FLAG_NX BIT(15) 39*4882a593Smuzhiyun #define MACHINE_FLAG_GS BIT(16) 40*4882a593Smuzhiyun #define MACHINE_FLAG_SCC BIT(17) 41*4882a593Smuzhiyun #define MACHINE_FLAG_PCI_MIO BIT(18) 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define LPP_MAGIC BIT(31) 44*4882a593Smuzhiyun #define LPP_PID_MASK _AC(0xffffffff, UL) 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* Offsets to entry points in kernel/head.S */ 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define STARTUP_NORMAL_OFFSET 0x10000 49*4882a593Smuzhiyun #define STARTUP_KDUMP_OFFSET 0x10010 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Offsets to parameters in kernel/head.S */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define IPL_DEVICE_OFFSET 0x10400 54*4882a593Smuzhiyun #define INITRD_START_OFFSET 0x10408 55*4882a593Smuzhiyun #define INITRD_SIZE_OFFSET 0x10410 56*4882a593Smuzhiyun #define OLDMEM_BASE_OFFSET 0x10418 57*4882a593Smuzhiyun #define OLDMEM_SIZE_OFFSET 0x10420 58*4882a593Smuzhiyun #define KERNEL_VERSION_OFFSET 0x10428 59*4882a593Smuzhiyun #define COMMAND_LINE_OFFSET 0x10480 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #include <asm/lowcore.h> 64*4882a593Smuzhiyun #include <asm/types.h> 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define IPL_DEVICE (*(unsigned long *) (IPL_DEVICE_OFFSET)) 67*4882a593Smuzhiyun #define INITRD_START (*(unsigned long *) (INITRD_START_OFFSET)) 68*4882a593Smuzhiyun #define INITRD_SIZE (*(unsigned long *) (INITRD_SIZE_OFFSET)) 69*4882a593Smuzhiyun #define OLDMEM_BASE (*(unsigned long *) (OLDMEM_BASE_OFFSET)) 70*4882a593Smuzhiyun #define OLDMEM_SIZE (*(unsigned long *) (OLDMEM_SIZE_OFFSET)) 71*4882a593Smuzhiyun #define COMMAND_LINE ((char *) (COMMAND_LINE_OFFSET)) 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun struct parmarea { 74*4882a593Smuzhiyun unsigned long ipl_device; /* 0x10400 */ 75*4882a593Smuzhiyun unsigned long initrd_start; /* 0x10408 */ 76*4882a593Smuzhiyun unsigned long initrd_size; /* 0x10410 */ 77*4882a593Smuzhiyun unsigned long oldmem_base; /* 0x10418 */ 78*4882a593Smuzhiyun unsigned long oldmem_size; /* 0x10420 */ 79*4882a593Smuzhiyun unsigned long kernel_version; /* 0x10428 */ 80*4882a593Smuzhiyun char pad1[0x10480 - 0x10430]; /* 0x10430 - 0x10480 */ 81*4882a593Smuzhiyun char command_line[ARCH_COMMAND_LINE_SIZE]; /* 0x10480 */ 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun extern unsigned int zlib_dfltcc_support; 85*4882a593Smuzhiyun #define ZLIB_DFLTCC_DISABLED 0 86*4882a593Smuzhiyun #define ZLIB_DFLTCC_FULL 1 87*4882a593Smuzhiyun #define ZLIB_DFLTCC_DEFLATE_ONLY 2 88*4882a593Smuzhiyun #define ZLIB_DFLTCC_INFLATE_ONLY 3 89*4882a593Smuzhiyun #define ZLIB_DFLTCC_FULL_DEBUG 4 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun extern int noexec_disabled; 92*4882a593Smuzhiyun extern int memory_end_set; 93*4882a593Smuzhiyun extern unsigned long memory_end; 94*4882a593Smuzhiyun extern unsigned long vmalloc_size; 95*4882a593Smuzhiyun extern unsigned long max_physmem_end; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* The Write Back bit position in the physaddr is given by the SLPC PCI */ 98*4882a593Smuzhiyun extern unsigned long mio_wb_bit_mask; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM) 101*4882a593Smuzhiyun #define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM) 102*4882a593Smuzhiyun #define MACHINE_IS_LPAR (S390_lowcore.machine_flags & MACHINE_FLAG_LPAR) 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define MACHINE_HAS_DIAG9C (S390_lowcore.machine_flags & MACHINE_FLAG_DIAG9C) 105*4882a593Smuzhiyun #define MACHINE_HAS_ESOP (S390_lowcore.machine_flags & MACHINE_FLAG_ESOP) 106*4882a593Smuzhiyun #define MACHINE_HAS_IDTE (S390_lowcore.machine_flags & MACHINE_FLAG_IDTE) 107*4882a593Smuzhiyun #define MACHINE_HAS_EDAT1 (S390_lowcore.machine_flags & MACHINE_FLAG_EDAT1) 108*4882a593Smuzhiyun #define MACHINE_HAS_EDAT2 (S390_lowcore.machine_flags & MACHINE_FLAG_EDAT2) 109*4882a593Smuzhiyun #define MACHINE_HAS_TOPOLOGY (S390_lowcore.machine_flags & MACHINE_FLAG_TOPOLOGY) 110*4882a593Smuzhiyun #define MACHINE_HAS_TE (S390_lowcore.machine_flags & MACHINE_FLAG_TE) 111*4882a593Smuzhiyun #define MACHINE_HAS_TLB_LC (S390_lowcore.machine_flags & MACHINE_FLAG_TLB_LC) 112*4882a593Smuzhiyun #define MACHINE_HAS_VX (S390_lowcore.machine_flags & MACHINE_FLAG_VX) 113*4882a593Smuzhiyun #define MACHINE_HAS_TLB_GUEST (S390_lowcore.machine_flags & MACHINE_FLAG_TLB_GUEST) 114*4882a593Smuzhiyun #define MACHINE_HAS_NX (S390_lowcore.machine_flags & MACHINE_FLAG_NX) 115*4882a593Smuzhiyun #define MACHINE_HAS_GS (S390_lowcore.machine_flags & MACHINE_FLAG_GS) 116*4882a593Smuzhiyun #define MACHINE_HAS_SCC (S390_lowcore.machine_flags & MACHINE_FLAG_SCC) 117*4882a593Smuzhiyun #define MACHINE_HAS_PCI_MIO (S390_lowcore.machine_flags & MACHINE_FLAG_PCI_MIO) 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun /* 120*4882a593Smuzhiyun * Console mode. Override with conmode= 121*4882a593Smuzhiyun */ 122*4882a593Smuzhiyun extern unsigned int console_mode; 123*4882a593Smuzhiyun extern unsigned int console_devno; 124*4882a593Smuzhiyun extern unsigned int console_irq; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #define CONSOLE_IS_UNDEFINED (console_mode == 0) 127*4882a593Smuzhiyun #define CONSOLE_IS_SCLP (console_mode == 1) 128*4882a593Smuzhiyun #define CONSOLE_IS_3215 (console_mode == 2) 129*4882a593Smuzhiyun #define CONSOLE_IS_3270 (console_mode == 3) 130*4882a593Smuzhiyun #define CONSOLE_IS_VT220 (console_mode == 4) 131*4882a593Smuzhiyun #define CONSOLE_IS_HVC (console_mode == 5) 132*4882a593Smuzhiyun #define SET_CONSOLE_SCLP do { console_mode = 1; } while (0) 133*4882a593Smuzhiyun #define SET_CONSOLE_3215 do { console_mode = 2; } while (0) 134*4882a593Smuzhiyun #define SET_CONSOLE_3270 do { console_mode = 3; } while (0) 135*4882a593Smuzhiyun #define SET_CONSOLE_VT220 do { console_mode = 4; } while (0) 136*4882a593Smuzhiyun #define SET_CONSOLE_HVC do { console_mode = 5; } while (0) 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun #ifdef CONFIG_PFAULT 139*4882a593Smuzhiyun extern int pfault_init(void); 140*4882a593Smuzhiyun extern void pfault_fini(void); 141*4882a593Smuzhiyun #else /* CONFIG_PFAULT */ 142*4882a593Smuzhiyun #define pfault_init() ({-1;}) 143*4882a593Smuzhiyun #define pfault_fini() do { } while (0) 144*4882a593Smuzhiyun #endif /* CONFIG_PFAULT */ 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun #ifdef CONFIG_VMCP 147*4882a593Smuzhiyun void vmcp_cma_reserve(void); 148*4882a593Smuzhiyun #else vmcp_cma_reserve(void)149*4882a593Smuzhiyunstatic inline void vmcp_cma_reserve(void) { } 150*4882a593Smuzhiyun #endif 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun void report_user_fault(struct pt_regs *regs, long signr, int is_mm_fault); 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun void cmma_init(void); 155*4882a593Smuzhiyun void cmma_init_nodat(void); 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun extern void (*_machine_restart)(char *command); 158*4882a593Smuzhiyun extern void (*_machine_halt)(void); 159*4882a593Smuzhiyun extern void (*_machine_power_off)(void); 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun extern unsigned long __kaslr_offset; kaslr_offset(void)162*4882a593Smuzhiyunstatic inline unsigned long kaslr_offset(void) 163*4882a593Smuzhiyun { 164*4882a593Smuzhiyun return __kaslr_offset; 165*4882a593Smuzhiyun } 166*4882a593Smuzhiyun gen_lpswe(unsigned long addr)167*4882a593Smuzhiyunstatic inline u32 gen_lpswe(unsigned long addr) 168*4882a593Smuzhiyun { 169*4882a593Smuzhiyun BUILD_BUG_ON(addr > 0xfff); 170*4882a593Smuzhiyun return 0xb2b20000 | addr; 171*4882a593Smuzhiyun } 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun #else /* __ASSEMBLY__ */ 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun #define IPL_DEVICE (IPL_DEVICE_OFFSET) 176*4882a593Smuzhiyun #define INITRD_START (INITRD_START_OFFSET) 177*4882a593Smuzhiyun #define INITRD_SIZE (INITRD_SIZE_OFFSET) 178*4882a593Smuzhiyun #define OLDMEM_BASE (OLDMEM_BASE_OFFSET) 179*4882a593Smuzhiyun #define OLDMEM_SIZE (OLDMEM_SIZE_OFFSET) 180*4882a593Smuzhiyun #define COMMAND_LINE (COMMAND_LINE_OFFSET) 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 183*4882a593Smuzhiyun #endif /* _ASM_S390_SETUP_H */ 184