1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * S390 version
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Derived from "include/asm-i386/mmu_context.h"
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef __S390_MMU_CONTEXT_H
9*4882a593Smuzhiyun #define __S390_MMU_CONTEXT_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <asm/pgalloc.h>
12*4882a593Smuzhiyun #include <linux/uaccess.h>
13*4882a593Smuzhiyun #include <linux/mm_types.h>
14*4882a593Smuzhiyun #include <asm/tlbflush.h>
15*4882a593Smuzhiyun #include <asm/ctl_reg.h>
16*4882a593Smuzhiyun #include <asm-generic/mm_hooks.h>
17*4882a593Smuzhiyun
init_new_context(struct task_struct * tsk,struct mm_struct * mm)18*4882a593Smuzhiyun static inline int init_new_context(struct task_struct *tsk,
19*4882a593Smuzhiyun struct mm_struct *mm)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun unsigned long asce_type, init_entry;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun spin_lock_init(&mm->context.lock);
24*4882a593Smuzhiyun INIT_LIST_HEAD(&mm->context.pgtable_list);
25*4882a593Smuzhiyun INIT_LIST_HEAD(&mm->context.gmap_list);
26*4882a593Smuzhiyun cpumask_clear(&mm->context.cpu_attach_mask);
27*4882a593Smuzhiyun atomic_set(&mm->context.flush_count, 0);
28*4882a593Smuzhiyun atomic_set(&mm->context.is_protected, 0);
29*4882a593Smuzhiyun mm->context.gmap_asce = 0;
30*4882a593Smuzhiyun mm->context.flush_mm = 0;
31*4882a593Smuzhiyun #ifdef CONFIG_PGSTE
32*4882a593Smuzhiyun mm->context.alloc_pgste = page_table_allocate_pgste ||
33*4882a593Smuzhiyun test_thread_flag(TIF_PGSTE) ||
34*4882a593Smuzhiyun (current->mm && current->mm->context.alloc_pgste);
35*4882a593Smuzhiyun mm->context.has_pgste = 0;
36*4882a593Smuzhiyun mm->context.uses_skeys = 0;
37*4882a593Smuzhiyun mm->context.uses_cmm = 0;
38*4882a593Smuzhiyun mm->context.allow_gmap_hpage_1m = 0;
39*4882a593Smuzhiyun #endif
40*4882a593Smuzhiyun switch (mm->context.asce_limit) {
41*4882a593Smuzhiyun default:
42*4882a593Smuzhiyun /*
43*4882a593Smuzhiyun * context created by exec, the value of asce_limit can
44*4882a593Smuzhiyun * only be zero in this case
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun VM_BUG_ON(mm->context.asce_limit);
47*4882a593Smuzhiyun /* continue as 3-level task */
48*4882a593Smuzhiyun mm->context.asce_limit = _REGION2_SIZE;
49*4882a593Smuzhiyun fallthrough;
50*4882a593Smuzhiyun case _REGION2_SIZE:
51*4882a593Smuzhiyun /* forked 3-level task */
52*4882a593Smuzhiyun init_entry = _REGION3_ENTRY_EMPTY;
53*4882a593Smuzhiyun asce_type = _ASCE_TYPE_REGION3;
54*4882a593Smuzhiyun break;
55*4882a593Smuzhiyun case TASK_SIZE_MAX:
56*4882a593Smuzhiyun /* forked 5-level task */
57*4882a593Smuzhiyun init_entry = _REGION1_ENTRY_EMPTY;
58*4882a593Smuzhiyun asce_type = _ASCE_TYPE_REGION1;
59*4882a593Smuzhiyun break;
60*4882a593Smuzhiyun case _REGION1_SIZE:
61*4882a593Smuzhiyun /* forked 4-level task */
62*4882a593Smuzhiyun init_entry = _REGION2_ENTRY_EMPTY;
63*4882a593Smuzhiyun asce_type = _ASCE_TYPE_REGION2;
64*4882a593Smuzhiyun break;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
67*4882a593Smuzhiyun _ASCE_USER_BITS | asce_type;
68*4882a593Smuzhiyun crst_table_init((unsigned long *) mm->pgd, init_entry);
69*4882a593Smuzhiyun return 0;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define destroy_context(mm) do { } while (0)
73*4882a593Smuzhiyun
set_user_asce(struct mm_struct * mm)74*4882a593Smuzhiyun static inline void set_user_asce(struct mm_struct *mm)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun S390_lowcore.user_asce = mm->context.asce;
77*4882a593Smuzhiyun __ctl_load(S390_lowcore.user_asce, 1, 1);
78*4882a593Smuzhiyun clear_cpu_flag(CIF_ASCE_PRIMARY);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
clear_user_asce(void)81*4882a593Smuzhiyun static inline void clear_user_asce(void)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun S390_lowcore.user_asce = S390_lowcore.kernel_asce;
84*4882a593Smuzhiyun __ctl_load(S390_lowcore.kernel_asce, 1, 1);
85*4882a593Smuzhiyun set_cpu_flag(CIF_ASCE_PRIMARY);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun mm_segment_t enable_sacf_uaccess(void);
89*4882a593Smuzhiyun void disable_sacf_uaccess(mm_segment_t old_fs);
90*4882a593Smuzhiyun
switch_mm(struct mm_struct * prev,struct mm_struct * next,struct task_struct * tsk)91*4882a593Smuzhiyun static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
92*4882a593Smuzhiyun struct task_struct *tsk)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun int cpu = smp_processor_id();
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun S390_lowcore.user_asce = next->context.asce;
97*4882a593Smuzhiyun cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
98*4882a593Smuzhiyun /* Clear previous user-ASCE from CR1 and CR7 */
99*4882a593Smuzhiyun if (!test_cpu_flag(CIF_ASCE_PRIMARY)) {
100*4882a593Smuzhiyun __ctl_load(S390_lowcore.kernel_asce, 1, 1);
101*4882a593Smuzhiyun set_cpu_flag(CIF_ASCE_PRIMARY);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun if (test_cpu_flag(CIF_ASCE_SECONDARY)) {
104*4882a593Smuzhiyun __ctl_load(S390_lowcore.vdso_asce, 7, 7);
105*4882a593Smuzhiyun clear_cpu_flag(CIF_ASCE_SECONDARY);
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun if (prev != next)
108*4882a593Smuzhiyun cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun #define finish_arch_post_lock_switch finish_arch_post_lock_switch
finish_arch_post_lock_switch(void)112*4882a593Smuzhiyun static inline void finish_arch_post_lock_switch(void)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct task_struct *tsk = current;
115*4882a593Smuzhiyun struct mm_struct *mm = tsk->mm;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (mm) {
118*4882a593Smuzhiyun preempt_disable();
119*4882a593Smuzhiyun while (atomic_read(&mm->context.flush_count))
120*4882a593Smuzhiyun cpu_relax();
121*4882a593Smuzhiyun cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
122*4882a593Smuzhiyun __tlb_flush_mm_lazy(mm);
123*4882a593Smuzhiyun preempt_enable();
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun set_fs(current->thread.mm_segment);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #define enter_lazy_tlb(mm,tsk) do { } while (0)
129*4882a593Smuzhiyun #define deactivate_mm(tsk,mm) do { } while (0)
130*4882a593Smuzhiyun
activate_mm(struct mm_struct * prev,struct mm_struct * next)131*4882a593Smuzhiyun static inline void activate_mm(struct mm_struct *prev,
132*4882a593Smuzhiyun struct mm_struct *next)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun switch_mm(prev, next, current);
135*4882a593Smuzhiyun cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
136*4882a593Smuzhiyun set_user_asce(next);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun #endif /* __S390_MMU_CONTEXT_H */
140