1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright IBM Corp. 2006, 2010 4*4882a593Smuzhiyun * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __ASM_IRQFLAGS_H 8*4882a593Smuzhiyun #define __ASM_IRQFLAGS_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define ARCH_IRQ_ENABLED (3UL << (BITS_PER_LONG - 8)) 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* store then OR system mask. */ 15*4882a593Smuzhiyun #define __arch_local_irq_stosm(__or) \ 16*4882a593Smuzhiyun ({ \ 17*4882a593Smuzhiyun unsigned long __mask; \ 18*4882a593Smuzhiyun asm volatile( \ 19*4882a593Smuzhiyun " stosm %0,%1" \ 20*4882a593Smuzhiyun : "=Q" (__mask) : "i" (__or) : "memory"); \ 21*4882a593Smuzhiyun __mask; \ 22*4882a593Smuzhiyun }) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* store then AND system mask. */ 25*4882a593Smuzhiyun #define __arch_local_irq_stnsm(__and) \ 26*4882a593Smuzhiyun ({ \ 27*4882a593Smuzhiyun unsigned long __mask; \ 28*4882a593Smuzhiyun asm volatile( \ 29*4882a593Smuzhiyun " stnsm %0,%1" \ 30*4882a593Smuzhiyun : "=Q" (__mask) : "i" (__and) : "memory"); \ 31*4882a593Smuzhiyun __mask; \ 32*4882a593Smuzhiyun }) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* set system mask. */ __arch_local_irq_ssm(unsigned long flags)35*4882a593Smuzhiyunstatic inline notrace void __arch_local_irq_ssm(unsigned long flags) 36*4882a593Smuzhiyun { 37*4882a593Smuzhiyun asm volatile("ssm %0" : : "Q" (flags) : "memory"); 38*4882a593Smuzhiyun } 39*4882a593Smuzhiyun arch_local_save_flags(void)40*4882a593Smuzhiyunstatic inline notrace unsigned long arch_local_save_flags(void) 41*4882a593Smuzhiyun { 42*4882a593Smuzhiyun return __arch_local_irq_stnsm(0xff); 43*4882a593Smuzhiyun } 44*4882a593Smuzhiyun arch_local_irq_save(void)45*4882a593Smuzhiyunstatic inline notrace unsigned long arch_local_irq_save(void) 46*4882a593Smuzhiyun { 47*4882a593Smuzhiyun return __arch_local_irq_stnsm(0xfc); 48*4882a593Smuzhiyun } 49*4882a593Smuzhiyun arch_local_irq_disable(void)50*4882a593Smuzhiyunstatic inline notrace void arch_local_irq_disable(void) 51*4882a593Smuzhiyun { 52*4882a593Smuzhiyun arch_local_irq_save(); 53*4882a593Smuzhiyun } 54*4882a593Smuzhiyun arch_local_irq_enable(void)55*4882a593Smuzhiyunstatic inline notrace void arch_local_irq_enable(void) 56*4882a593Smuzhiyun { 57*4882a593Smuzhiyun __arch_local_irq_stosm(0x03); 58*4882a593Smuzhiyun } 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* This only restores external and I/O interrupt state */ arch_local_irq_restore(unsigned long flags)61*4882a593Smuzhiyunstatic inline notrace void arch_local_irq_restore(unsigned long flags) 62*4882a593Smuzhiyun { 63*4882a593Smuzhiyun /* only disabled->disabled and disabled->enabled is valid */ 64*4882a593Smuzhiyun if (flags & ARCH_IRQ_ENABLED) 65*4882a593Smuzhiyun arch_local_irq_enable(); 66*4882a593Smuzhiyun } 67*4882a593Smuzhiyun arch_irqs_disabled_flags(unsigned long flags)68*4882a593Smuzhiyunstatic inline notrace bool arch_irqs_disabled_flags(unsigned long flags) 69*4882a593Smuzhiyun { 70*4882a593Smuzhiyun return !(flags & ARCH_IRQ_ENABLED); 71*4882a593Smuzhiyun } 72*4882a593Smuzhiyun arch_irqs_disabled(void)73*4882a593Smuzhiyunstatic inline notrace bool arch_irqs_disabled(void) 74*4882a593Smuzhiyun { 75*4882a593Smuzhiyun return arch_irqs_disabled_flags(arch_local_save_flags()); 76*4882a593Smuzhiyun } 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #endif /* __ASM_IRQFLAGS_H */ 79