xref: /OK3568_Linux_fs/kernel/arch/s390/include/asm/ctl_reg.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright IBM Corp. 1999, 2009
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef __ASM_CTL_REG_H
9*4882a593Smuzhiyun #define __ASM_CTL_REG_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/bits.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define CR0_CLOCK_COMPARATOR_SIGN	BIT(63 - 10)
14*4882a593Smuzhiyun #define CR0_LOW_ADDRESS_PROTECTION	BIT(63 - 35)
15*4882a593Smuzhiyun #define CR0_EMERGENCY_SIGNAL_SUBMASK	BIT(63 - 49)
16*4882a593Smuzhiyun #define CR0_EXTERNAL_CALL_SUBMASK	BIT(63 - 50)
17*4882a593Smuzhiyun #define CR0_CLOCK_COMPARATOR_SUBMASK	BIT(63 - 52)
18*4882a593Smuzhiyun #define CR0_CPU_TIMER_SUBMASK		BIT(63 - 53)
19*4882a593Smuzhiyun #define CR0_SERVICE_SIGNAL_SUBMASK	BIT(63 - 54)
20*4882a593Smuzhiyun #define CR0_UNUSED_56			BIT(63 - 56)
21*4882a593Smuzhiyun #define CR0_INTERRUPT_KEY_SUBMASK	BIT(63 - 57)
22*4882a593Smuzhiyun #define CR0_MEASUREMENT_ALERT_SUBMASK	BIT(63 - 58)
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define CR2_GUARDED_STORAGE		BIT(63 - 59)
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define CR14_UNUSED_32			BIT(63 - 32)
27*4882a593Smuzhiyun #define CR14_UNUSED_33			BIT(63 - 33)
28*4882a593Smuzhiyun #define CR14_CHANNEL_REPORT_SUBMASK	BIT(63 - 35)
29*4882a593Smuzhiyun #define CR14_RECOVERY_SUBMASK		BIT(63 - 36)
30*4882a593Smuzhiyun #define CR14_DEGRADATION_SUBMASK	BIT(63 - 37)
31*4882a593Smuzhiyun #define CR14_EXTERNAL_DAMAGE_SUBMASK	BIT(63 - 38)
32*4882a593Smuzhiyun #define CR14_WARNING_SUBMASK		BIT(63 - 39)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #ifndef __ASSEMBLY__
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #include <linux/bug.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define __ctl_load(array, low, high) do {				\
39*4882a593Smuzhiyun 	typedef struct { char _[sizeof(array)]; } addrtype;		\
40*4882a593Smuzhiyun 									\
41*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
42*4882a593Smuzhiyun 	asm volatile(							\
43*4882a593Smuzhiyun 		"	lctlg	%1,%2,%0\n"				\
44*4882a593Smuzhiyun 		:							\
45*4882a593Smuzhiyun 		: "Q" (*(addrtype *)(&array)), "i" (low), "i" (high)	\
46*4882a593Smuzhiyun 		: "memory");						\
47*4882a593Smuzhiyun } while (0)
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define __ctl_store(array, low, high) do {				\
50*4882a593Smuzhiyun 	typedef struct { char _[sizeof(array)]; } addrtype;		\
51*4882a593Smuzhiyun 									\
52*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
53*4882a593Smuzhiyun 	asm volatile(							\
54*4882a593Smuzhiyun 		"	stctg	%1,%2,%0\n"				\
55*4882a593Smuzhiyun 		: "=Q" (*(addrtype *)(&array))				\
56*4882a593Smuzhiyun 		: "i" (low), "i" (high));				\
57*4882a593Smuzhiyun } while (0)
58*4882a593Smuzhiyun 
__ctl_set_bit(unsigned int cr,unsigned int bit)59*4882a593Smuzhiyun static __always_inline void __ctl_set_bit(unsigned int cr, unsigned int bit)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	unsigned long reg;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	__ctl_store(reg, cr, cr);
64*4882a593Smuzhiyun 	reg |= 1UL << bit;
65*4882a593Smuzhiyun 	__ctl_load(reg, cr, cr);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
__ctl_clear_bit(unsigned int cr,unsigned int bit)68*4882a593Smuzhiyun static __always_inline void __ctl_clear_bit(unsigned int cr, unsigned int bit)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	unsigned long reg;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	__ctl_store(reg, cr, cr);
73*4882a593Smuzhiyun 	reg &= ~(1UL << bit);
74*4882a593Smuzhiyun 	__ctl_load(reg, cr, cr);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun void smp_ctl_set_bit(int cr, int bit);
78*4882a593Smuzhiyun void smp_ctl_clear_bit(int cr, int bit);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun union ctlreg0 {
81*4882a593Smuzhiyun 	unsigned long val;
82*4882a593Smuzhiyun 	struct {
83*4882a593Smuzhiyun 		unsigned long	   : 8;
84*4882a593Smuzhiyun 		unsigned long tcx  : 1;	/* Transactional-Execution control */
85*4882a593Smuzhiyun 		unsigned long pifo : 1;	/* Transactional-Execution Program-
86*4882a593Smuzhiyun 					   Interruption-Filtering Override */
87*4882a593Smuzhiyun 		unsigned long	   : 22;
88*4882a593Smuzhiyun 		unsigned long	   : 3;
89*4882a593Smuzhiyun 		unsigned long lap  : 1; /* Low-address-protection control */
90*4882a593Smuzhiyun 		unsigned long	   : 4;
91*4882a593Smuzhiyun 		unsigned long edat : 1; /* Enhanced-DAT-enablement control */
92*4882a593Smuzhiyun 		unsigned long	   : 2;
93*4882a593Smuzhiyun 		unsigned long iep  : 1; /* Instruction-Execution-Protection */
94*4882a593Smuzhiyun 		unsigned long	   : 1;
95*4882a593Smuzhiyun 		unsigned long afp  : 1; /* AFP-register control */
96*4882a593Smuzhiyun 		unsigned long vx   : 1; /* Vector enablement control */
97*4882a593Smuzhiyun 		unsigned long	   : 7;
98*4882a593Smuzhiyun 		unsigned long sssm : 1; /* Service signal subclass mask */
99*4882a593Smuzhiyun 		unsigned long	   : 9;
100*4882a593Smuzhiyun 	};
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun union ctlreg2 {
104*4882a593Smuzhiyun 	unsigned long val;
105*4882a593Smuzhiyun 	struct {
106*4882a593Smuzhiyun 		unsigned long	    : 33;
107*4882a593Smuzhiyun 		unsigned long ducto : 25;
108*4882a593Smuzhiyun 		unsigned long	    : 1;
109*4882a593Smuzhiyun 		unsigned long gse   : 1;
110*4882a593Smuzhiyun 		unsigned long	    : 1;
111*4882a593Smuzhiyun 		unsigned long tds   : 1;
112*4882a593Smuzhiyun 		unsigned long tdc   : 2;
113*4882a593Smuzhiyun 	};
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun #define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
117*4882a593Smuzhiyun #define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */
120*4882a593Smuzhiyun #endif /* __ASM_CTL_REG_H */
121