1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright IBM Corp. 2002, 2007
4*4882a593Smuzhiyun * Author(s): Ingo Adlung <adlung@de.ibm.com>
5*4882a593Smuzhiyun * Cornelia Huck <cornelia.huck@de.ibm.com>
6*4882a593Smuzhiyun * Arnd Bergmann <arndb@de.ibm.com>
7*4882a593Smuzhiyun * Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #ifndef _ASM_S390_AIRQ_H
11*4882a593Smuzhiyun #define _ASM_S390_AIRQ_H
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/bit_spinlock.h>
14*4882a593Smuzhiyun #include <linux/dma-mapping.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun struct airq_struct {
17*4882a593Smuzhiyun struct hlist_node list; /* Handler queueing. */
18*4882a593Smuzhiyun void (*handler)(struct airq_struct *airq, bool floating);
19*4882a593Smuzhiyun u8 *lsi_ptr; /* Local-Summary-Indicator pointer */
20*4882a593Smuzhiyun u8 lsi_mask; /* Local-Summary-Indicator mask */
21*4882a593Smuzhiyun u8 isc; /* Interrupt-subclass */
22*4882a593Smuzhiyun u8 flags;
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define AIRQ_PTR_ALLOCATED 0x01
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun int register_adapter_interrupt(struct airq_struct *airq);
28*4882a593Smuzhiyun void unregister_adapter_interrupt(struct airq_struct *airq);
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* Adapter interrupt bit vector */
31*4882a593Smuzhiyun struct airq_iv {
32*4882a593Smuzhiyun unsigned long *vector; /* Adapter interrupt bit vector */
33*4882a593Smuzhiyun dma_addr_t vector_dma; /* Adapter interrupt bit vector dma */
34*4882a593Smuzhiyun unsigned long *avail; /* Allocation bit mask for the bit vector */
35*4882a593Smuzhiyun unsigned long *bitlock; /* Lock bit mask for the bit vector */
36*4882a593Smuzhiyun unsigned long *ptr; /* Pointer associated with each bit */
37*4882a593Smuzhiyun unsigned int *data; /* 32 bit value associated with each bit */
38*4882a593Smuzhiyun unsigned long bits; /* Number of bits in the vector */
39*4882a593Smuzhiyun unsigned long end; /* Number of highest allocated bit + 1 */
40*4882a593Smuzhiyun unsigned long flags; /* Allocation flags */
41*4882a593Smuzhiyun spinlock_t lock; /* Lock to protect alloc & free */
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define AIRQ_IV_ALLOC 1 /* Use an allocation bit mask */
45*4882a593Smuzhiyun #define AIRQ_IV_BITLOCK 2 /* Allocate the lock bit mask */
46*4882a593Smuzhiyun #define AIRQ_IV_PTR 4 /* Allocate the ptr array */
47*4882a593Smuzhiyun #define AIRQ_IV_DATA 8 /* Allocate the data array */
48*4882a593Smuzhiyun #define AIRQ_IV_CACHELINE 16 /* Cacheline alignment for the vector */
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun struct airq_iv *airq_iv_create(unsigned long bits, unsigned long flags);
51*4882a593Smuzhiyun void airq_iv_release(struct airq_iv *iv);
52*4882a593Smuzhiyun unsigned long airq_iv_alloc(struct airq_iv *iv, unsigned long num);
53*4882a593Smuzhiyun void airq_iv_free(struct airq_iv *iv, unsigned long bit, unsigned long num);
54*4882a593Smuzhiyun unsigned long airq_iv_scan(struct airq_iv *iv, unsigned long start,
55*4882a593Smuzhiyun unsigned long end);
56*4882a593Smuzhiyun
airq_iv_alloc_bit(struct airq_iv * iv)57*4882a593Smuzhiyun static inline unsigned long airq_iv_alloc_bit(struct airq_iv *iv)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun return airq_iv_alloc(iv, 1);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
airq_iv_free_bit(struct airq_iv * iv,unsigned long bit)62*4882a593Smuzhiyun static inline void airq_iv_free_bit(struct airq_iv *iv, unsigned long bit)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun airq_iv_free(iv, bit, 1);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
airq_iv_end(struct airq_iv * iv)67*4882a593Smuzhiyun static inline unsigned long airq_iv_end(struct airq_iv *iv)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun return iv->end;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
airq_iv_lock(struct airq_iv * iv,unsigned long bit)72*4882a593Smuzhiyun static inline void airq_iv_lock(struct airq_iv *iv, unsigned long bit)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun const unsigned long be_to_le = BITS_PER_LONG - 1;
75*4882a593Smuzhiyun bit_spin_lock(bit ^ be_to_le, iv->bitlock);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
airq_iv_unlock(struct airq_iv * iv,unsigned long bit)78*4882a593Smuzhiyun static inline void airq_iv_unlock(struct airq_iv *iv, unsigned long bit)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun const unsigned long be_to_le = BITS_PER_LONG - 1;
81*4882a593Smuzhiyun bit_spin_unlock(bit ^ be_to_le, iv->bitlock);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
airq_iv_set_data(struct airq_iv * iv,unsigned long bit,unsigned int data)84*4882a593Smuzhiyun static inline void airq_iv_set_data(struct airq_iv *iv, unsigned long bit,
85*4882a593Smuzhiyun unsigned int data)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun iv->data[bit] = data;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
airq_iv_get_data(struct airq_iv * iv,unsigned long bit)90*4882a593Smuzhiyun static inline unsigned int airq_iv_get_data(struct airq_iv *iv,
91*4882a593Smuzhiyun unsigned long bit)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun return iv->data[bit];
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
airq_iv_set_ptr(struct airq_iv * iv,unsigned long bit,unsigned long ptr)96*4882a593Smuzhiyun static inline void airq_iv_set_ptr(struct airq_iv *iv, unsigned long bit,
97*4882a593Smuzhiyun unsigned long ptr)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun iv->ptr[bit] = ptr;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
airq_iv_get_ptr(struct airq_iv * iv,unsigned long bit)102*4882a593Smuzhiyun static inline unsigned long airq_iv_get_ptr(struct airq_iv *iv,
103*4882a593Smuzhiyun unsigned long bit)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun return iv->ptr[bit];
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun #endif /* _ASM_S390_AIRQ_H */
109