1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2006 Ralf Baechle (ralf@linux-mips.org)
4*4882a593Smuzhiyun * Copyright (c) 2018 Jim Wilson (jimw@sifive.com)
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef _ASM_RISCV_FUTEX_H
8*4882a593Smuzhiyun #define _ASM_RISCV_FUTEX_H
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/futex.h>
11*4882a593Smuzhiyun #include <linux/uaccess.h>
12*4882a593Smuzhiyun #include <linux/errno.h>
13*4882a593Smuzhiyun #include <asm/asm.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun /* We don't even really need the extable code, but for now keep it simple */
16*4882a593Smuzhiyun #ifndef CONFIG_MMU
17*4882a593Smuzhiyun #define __enable_user_access() do { } while (0)
18*4882a593Smuzhiyun #define __disable_user_access() do { } while (0)
19*4882a593Smuzhiyun #endif
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
22*4882a593Smuzhiyun { \
23*4882a593Smuzhiyun uintptr_t tmp; \
24*4882a593Smuzhiyun __enable_user_access(); \
25*4882a593Smuzhiyun __asm__ __volatile__ ( \
26*4882a593Smuzhiyun "1: " insn " \n" \
27*4882a593Smuzhiyun "2: \n" \
28*4882a593Smuzhiyun " .section .fixup,\"ax\" \n" \
29*4882a593Smuzhiyun " .balign 4 \n" \
30*4882a593Smuzhiyun "3: li %[r],%[e] \n" \
31*4882a593Smuzhiyun " jump 2b,%[t] \n" \
32*4882a593Smuzhiyun " .previous \n" \
33*4882a593Smuzhiyun " .section __ex_table,\"a\" \n" \
34*4882a593Smuzhiyun " .balign " RISCV_SZPTR " \n" \
35*4882a593Smuzhiyun " " RISCV_PTR " 1b, 3b \n" \
36*4882a593Smuzhiyun " .previous \n" \
37*4882a593Smuzhiyun : [r] "+r" (ret), [ov] "=&r" (oldval), \
38*4882a593Smuzhiyun [u] "+m" (*uaddr), [t] "=&r" (tmp) \
39*4882a593Smuzhiyun : [op] "Jr" (oparg), [e] "i" (-EFAULT) \
40*4882a593Smuzhiyun : "memory"); \
41*4882a593Smuzhiyun __disable_user_access(); \
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static inline int
arch_futex_atomic_op_inuser(int op,int oparg,int * oval,u32 __user * uaddr)45*4882a593Smuzhiyun arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun int oldval = 0, ret = 0;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun if (!access_ok(uaddr, sizeof(u32)))
50*4882a593Smuzhiyun return -EFAULT;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun switch (op) {
53*4882a593Smuzhiyun case FUTEX_OP_SET:
54*4882a593Smuzhiyun __futex_atomic_op("amoswap.w.aqrl %[ov],%z[op],%[u]",
55*4882a593Smuzhiyun ret, oldval, uaddr, oparg);
56*4882a593Smuzhiyun break;
57*4882a593Smuzhiyun case FUTEX_OP_ADD:
58*4882a593Smuzhiyun __futex_atomic_op("amoadd.w.aqrl %[ov],%z[op],%[u]",
59*4882a593Smuzhiyun ret, oldval, uaddr, oparg);
60*4882a593Smuzhiyun break;
61*4882a593Smuzhiyun case FUTEX_OP_OR:
62*4882a593Smuzhiyun __futex_atomic_op("amoor.w.aqrl %[ov],%z[op],%[u]",
63*4882a593Smuzhiyun ret, oldval, uaddr, oparg);
64*4882a593Smuzhiyun break;
65*4882a593Smuzhiyun case FUTEX_OP_ANDN:
66*4882a593Smuzhiyun __futex_atomic_op("amoand.w.aqrl %[ov],%z[op],%[u]",
67*4882a593Smuzhiyun ret, oldval, uaddr, ~oparg);
68*4882a593Smuzhiyun break;
69*4882a593Smuzhiyun case FUTEX_OP_XOR:
70*4882a593Smuzhiyun __futex_atomic_op("amoxor.w.aqrl %[ov],%z[op],%[u]",
71*4882a593Smuzhiyun ret, oldval, uaddr, oparg);
72*4882a593Smuzhiyun break;
73*4882a593Smuzhiyun default:
74*4882a593Smuzhiyun ret = -ENOSYS;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if (!ret)
78*4882a593Smuzhiyun *oval = oldval;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return ret;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static inline int
futex_atomic_cmpxchg_inatomic(u32 * uval,u32 __user * uaddr,u32 oldval,u32 newval)84*4882a593Smuzhiyun futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
85*4882a593Smuzhiyun u32 oldval, u32 newval)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun int ret = 0;
88*4882a593Smuzhiyun u32 val;
89*4882a593Smuzhiyun uintptr_t tmp;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun if (!access_ok(uaddr, sizeof(u32)))
92*4882a593Smuzhiyun return -EFAULT;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun __enable_user_access();
95*4882a593Smuzhiyun __asm__ __volatile__ (
96*4882a593Smuzhiyun "1: lr.w.aqrl %[v],%[u] \n"
97*4882a593Smuzhiyun " bne %[v],%z[ov],3f \n"
98*4882a593Smuzhiyun "2: sc.w.aqrl %[t],%z[nv],%[u] \n"
99*4882a593Smuzhiyun " bnez %[t],1b \n"
100*4882a593Smuzhiyun "3: \n"
101*4882a593Smuzhiyun " .section .fixup,\"ax\" \n"
102*4882a593Smuzhiyun " .balign 4 \n"
103*4882a593Smuzhiyun "4: li %[r],%[e] \n"
104*4882a593Smuzhiyun " jump 3b,%[t] \n"
105*4882a593Smuzhiyun " .previous \n"
106*4882a593Smuzhiyun " .section __ex_table,\"a\" \n"
107*4882a593Smuzhiyun " .balign " RISCV_SZPTR " \n"
108*4882a593Smuzhiyun " " RISCV_PTR " 1b, 4b \n"
109*4882a593Smuzhiyun " " RISCV_PTR " 2b, 4b \n"
110*4882a593Smuzhiyun " .previous \n"
111*4882a593Smuzhiyun : [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
112*4882a593Smuzhiyun : [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)
113*4882a593Smuzhiyun : "memory");
114*4882a593Smuzhiyun __disable_user_access();
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun *uval = val;
117*4882a593Smuzhiyun return ret;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun #endif /* _ASM_RISCV_FUTEX_H */
121