1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright (C) 2017 Andes Technology Corporation */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef _ASM_RISCV_FTRACE_H 5*4882a593Smuzhiyun #define _ASM_RISCV_FTRACE_H 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* 8*4882a593Smuzhiyun * The graph frame test is not possible if CONFIG_FRAME_POINTER is not enabled. 9*4882a593Smuzhiyun * Check arch/riscv/kernel/mcount.S for detail. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #if defined(CONFIG_FUNCTION_GRAPH_TRACER) && defined(CONFIG_FRAME_POINTER) 12*4882a593Smuzhiyun #define HAVE_FUNCTION_GRAPH_FP_TEST 13*4882a593Smuzhiyun #endif 14*4882a593Smuzhiyun #define HAVE_FUNCTION_GRAPH_RET_ADDR_PTR 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * Clang prior to 13 had "mcount" instead of "_mcount": 18*4882a593Smuzhiyun * https://reviews.llvm.org/D98881 19*4882a593Smuzhiyun */ 20*4882a593Smuzhiyun #if defined(CONFIG_CC_IS_GCC) || CONFIG_CLANG_VERSION >= 130000 21*4882a593Smuzhiyun #define MCOUNT_NAME _mcount 22*4882a593Smuzhiyun #else 23*4882a593Smuzhiyun #define MCOUNT_NAME mcount 24*4882a593Smuzhiyun #endif 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define ARCH_SUPPORTS_FTRACE_OPS 1 27*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 28*4882a593Smuzhiyun void MCOUNT_NAME(void); ftrace_call_adjust(unsigned long addr)29*4882a593Smuzhiyunstatic inline unsigned long ftrace_call_adjust(unsigned long addr) 30*4882a593Smuzhiyun { 31*4882a593Smuzhiyun return addr; 32*4882a593Smuzhiyun } 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun struct dyn_arch_ftrace { 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun #endif 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #ifdef CONFIG_DYNAMIC_FTRACE 39*4882a593Smuzhiyun /* 40*4882a593Smuzhiyun * A general call in RISC-V is a pair of insts: 41*4882a593Smuzhiyun * 1) auipc: setting high-20 pc-related bits to ra register 42*4882a593Smuzhiyun * 2) jalr: setting low-12 offset to ra, jump to ra, and set ra to 43*4882a593Smuzhiyun * return address (original pc + 4) 44*4882a593Smuzhiyun * 45*4882a593Smuzhiyun * Dynamic ftrace generates probes to call sites, so we must deal with 46*4882a593Smuzhiyun * both auipc and jalr at the same time. 47*4882a593Smuzhiyun */ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define MCOUNT_ADDR ((unsigned long)MCOUNT_NAME) 50*4882a593Smuzhiyun #define JALR_SIGN_MASK (0x00000800) 51*4882a593Smuzhiyun #define JALR_OFFSET_MASK (0x00000fff) 52*4882a593Smuzhiyun #define AUIPC_OFFSET_MASK (0xfffff000) 53*4882a593Smuzhiyun #define AUIPC_PAD (0x00001000) 54*4882a593Smuzhiyun #define JALR_SHIFT 20 55*4882a593Smuzhiyun #define JALR_BASIC (0x000080e7) 56*4882a593Smuzhiyun #define AUIPC_BASIC (0x00000097) 57*4882a593Smuzhiyun #define NOP4 (0x00000013) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define make_call(caller, callee, call) \ 60*4882a593Smuzhiyun do { \ 61*4882a593Smuzhiyun call[0] = to_auipc_insn((unsigned int)((unsigned long)callee - \ 62*4882a593Smuzhiyun (unsigned long)caller)); \ 63*4882a593Smuzhiyun call[1] = to_jalr_insn((unsigned int)((unsigned long)callee - \ 64*4882a593Smuzhiyun (unsigned long)caller)); \ 65*4882a593Smuzhiyun } while (0) 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #define to_jalr_insn(offset) \ 68*4882a593Smuzhiyun (((offset & JALR_OFFSET_MASK) << JALR_SHIFT) | JALR_BASIC) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define to_auipc_insn(offset) \ 71*4882a593Smuzhiyun ((offset & JALR_SIGN_MASK) ? \ 72*4882a593Smuzhiyun (((offset & AUIPC_OFFSET_MASK) + AUIPC_PAD) | AUIPC_BASIC) : \ 73*4882a593Smuzhiyun ((offset & AUIPC_OFFSET_MASK) | AUIPC_BASIC)) 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* 76*4882a593Smuzhiyun * Let auipc+jalr be the basic *mcount unit*, so we make it 8 bytes here. 77*4882a593Smuzhiyun */ 78*4882a593Smuzhiyun #define MCOUNT_INSN_SIZE 8 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 81*4882a593Smuzhiyun struct dyn_ftrace; 82*4882a593Smuzhiyun int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec); 83*4882a593Smuzhiyun #define ftrace_init_nop ftrace_init_nop 84*4882a593Smuzhiyun #endif 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #endif /* _ASM_RISCV_FTRACE_H */ 89