xref: /OK3568_Linux_fs/kernel/arch/riscv/include/asm/asm.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2015 Regents of the University of California
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #ifndef _ASM_RISCV_ASM_H
7*4882a593Smuzhiyun #define _ASM_RISCV_ASM_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifdef __ASSEMBLY__
10*4882a593Smuzhiyun #define __ASM_STR(x)	x
11*4882a593Smuzhiyun #else
12*4882a593Smuzhiyun #define __ASM_STR(x)	#x
13*4882a593Smuzhiyun #endif
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #if __riscv_xlen == 64
16*4882a593Smuzhiyun #define __REG_SEL(a, b)	__ASM_STR(a)
17*4882a593Smuzhiyun #elif __riscv_xlen == 32
18*4882a593Smuzhiyun #define __REG_SEL(a, b)	__ASM_STR(b)
19*4882a593Smuzhiyun #else
20*4882a593Smuzhiyun #error "Unexpected __riscv_xlen"
21*4882a593Smuzhiyun #endif
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define REG_L		__REG_SEL(ld, lw)
24*4882a593Smuzhiyun #define REG_S		__REG_SEL(sd, sw)
25*4882a593Smuzhiyun #define REG_SC		__REG_SEL(sc.d, sc.w)
26*4882a593Smuzhiyun #define SZREG		__REG_SEL(8, 4)
27*4882a593Smuzhiyun #define LGREG		__REG_SEL(3, 2)
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #if __SIZEOF_POINTER__ == 8
30*4882a593Smuzhiyun #ifdef __ASSEMBLY__
31*4882a593Smuzhiyun #define RISCV_PTR		.dword
32*4882a593Smuzhiyun #define RISCV_SZPTR		8
33*4882a593Smuzhiyun #define RISCV_LGPTR		3
34*4882a593Smuzhiyun #else
35*4882a593Smuzhiyun #define RISCV_PTR		".dword"
36*4882a593Smuzhiyun #define RISCV_SZPTR		"8"
37*4882a593Smuzhiyun #define RISCV_LGPTR		"3"
38*4882a593Smuzhiyun #endif
39*4882a593Smuzhiyun #elif __SIZEOF_POINTER__ == 4
40*4882a593Smuzhiyun #ifdef __ASSEMBLY__
41*4882a593Smuzhiyun #define RISCV_PTR		.word
42*4882a593Smuzhiyun #define RISCV_SZPTR		4
43*4882a593Smuzhiyun #define RISCV_LGPTR		2
44*4882a593Smuzhiyun #else
45*4882a593Smuzhiyun #define RISCV_PTR		".word"
46*4882a593Smuzhiyun #define RISCV_SZPTR		"4"
47*4882a593Smuzhiyun #define RISCV_LGPTR		"2"
48*4882a593Smuzhiyun #endif
49*4882a593Smuzhiyun #else
50*4882a593Smuzhiyun #error "Unexpected __SIZEOF_POINTER__"
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #if (__SIZEOF_INT__ == 4)
54*4882a593Smuzhiyun #define RISCV_INT		__ASM_STR(.word)
55*4882a593Smuzhiyun #define RISCV_SZINT		__ASM_STR(4)
56*4882a593Smuzhiyun #define RISCV_LGINT		__ASM_STR(2)
57*4882a593Smuzhiyun #else
58*4882a593Smuzhiyun #error "Unexpected __SIZEOF_INT__"
59*4882a593Smuzhiyun #endif
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #if (__SIZEOF_SHORT__ == 2)
62*4882a593Smuzhiyun #define RISCV_SHORT		__ASM_STR(.half)
63*4882a593Smuzhiyun #define RISCV_SZSHORT		__ASM_STR(2)
64*4882a593Smuzhiyun #define RISCV_LGSHORT		__ASM_STR(1)
65*4882a593Smuzhiyun #else
66*4882a593Smuzhiyun #error "Unexpected __SIZEOF_SHORT__"
67*4882a593Smuzhiyun #endif
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #endif /* _ASM_RISCV_ASM_H */
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