1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun #ifndef _POWERPC_SYSDEV_MPIC_H
3*4882a593Smuzhiyun #define _POWERPC_SYSDEV_MPIC_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun /*
6*4882a593Smuzhiyun * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #ifdef CONFIG_PCI_MSI
10*4882a593Smuzhiyun extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
11*4882a593Smuzhiyun extern int mpic_msi_init_allocator(struct mpic *mpic);
12*4882a593Smuzhiyun extern int mpic_u3msi_init(struct mpic *mpic);
13*4882a593Smuzhiyun #else
mpic_msi_reserve_hwirq(struct mpic * mpic,irq_hw_number_t hwirq)14*4882a593Smuzhiyun static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,
15*4882a593Smuzhiyun irq_hw_number_t hwirq)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun return;
18*4882a593Smuzhiyun }
19*4882a593Smuzhiyun
mpic_u3msi_init(struct mpic * mpic)20*4882a593Smuzhiyun static inline int mpic_u3msi_init(struct mpic *mpic)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun return -1;
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun #endif
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #if defined(CONFIG_PCI_MSI) && defined(CONFIG_PPC_PASEMI)
27*4882a593Smuzhiyun int mpic_pasemi_msi_init(struct mpic *mpic);
28*4882a593Smuzhiyun #else
mpic_pasemi_msi_init(struct mpic * mpic)29*4882a593Smuzhiyun static inline int mpic_pasemi_msi_init(struct mpic *mpic) { return -1; }
30*4882a593Smuzhiyun #endif
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun extern int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type);
33*4882a593Smuzhiyun extern void mpic_set_vector(unsigned int virq, unsigned int vector);
34*4882a593Smuzhiyun extern int mpic_set_affinity(struct irq_data *d,
35*4882a593Smuzhiyun const struct cpumask *cpumask, bool force);
36*4882a593Smuzhiyun extern void mpic_reset_core(int cpu);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #ifdef CONFIG_FSL_SOC
39*4882a593Smuzhiyun extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw);
40*4882a593Smuzhiyun extern void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum);
41*4882a593Smuzhiyun extern int mpic_setup_error_int(struct mpic *mpic, int intvec);
42*4882a593Smuzhiyun #else
mpic_map_error_int(struct mpic * mpic,unsigned int virq,irq_hw_number_t hw)43*4882a593Smuzhiyun static inline int mpic_map_error_int(struct mpic *mpic, unsigned int virq, irq_hw_number_t hw)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return 0;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun
mpic_err_int_init(struct mpic * mpic,irq_hw_number_t irqnum)49*4882a593Smuzhiyun static inline void mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun return;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
mpic_setup_error_int(struct mpic * mpic,int intvec)54*4882a593Smuzhiyun static inline int mpic_setup_error_int(struct mpic *mpic, int intvec)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun return -1;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun #endif
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #endif /* _POWERPC_SYSDEV_MPIC_H */
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