1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Enter and leave sleep state on chips with 6xx-style HID0 4*4882a593Smuzhiyun * power management bits, which don't leave sleep state via reset. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Author: Scott Wood <scottwood@freescale.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (c) 2006-2007 Freescale Semiconductor, Inc. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include <asm/ppc_asm.h> 12*4882a593Smuzhiyun#include <asm/reg.h> 13*4882a593Smuzhiyun#include <asm/thread_info.h> 14*4882a593Smuzhiyun#include <asm/asm-offsets.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun_GLOBAL(mpc6xx_enter_standby) 17*4882a593Smuzhiyun mflr r4 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun mfspr r5, SPRN_HID0 20*4882a593Smuzhiyun rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP) 21*4882a593Smuzhiyun oris r5, r5, HID0_SLEEP@h 22*4882a593Smuzhiyun mtspr SPRN_HID0, r5 23*4882a593Smuzhiyun isync 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun lis r5, ret_from_standby@h 26*4882a593Smuzhiyun ori r5, r5, ret_from_standby@l 27*4882a593Smuzhiyun mtlr r5 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun lwz r6, TI_LOCAL_FLAGS(r2) 30*4882a593Smuzhiyun ori r6, r6, _TLF_SLEEPING 31*4882a593Smuzhiyun stw r6, TI_LOCAL_FLAGS(r2) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun mfmsr r5 34*4882a593Smuzhiyun ori r5, r5, MSR_EE 35*4882a593Smuzhiyun oris r5, r5, MSR_POW@h 36*4882a593Smuzhiyun sync 37*4882a593Smuzhiyun mtmsr r5 38*4882a593Smuzhiyun isync 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun1: b 1b 41*4882a593Smuzhiyun 42*4882a593Smuzhiyunret_from_standby: 43*4882a593Smuzhiyun mfspr r5, SPRN_HID0 44*4882a593Smuzhiyun rlwinm r5, r5, 0, ~HID0_SLEEP 45*4882a593Smuzhiyun mtspr SPRN_HID0, r5 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun mtlr r4 48*4882a593Smuzhiyun blr 49