1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun #define pr_fmt(fmt) "papr-scm: " fmt
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/of.h>
6*4882a593Smuzhiyun #include <linux/kernel.h>
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/ioport.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <linux/ndctl.h>
11*4882a593Smuzhiyun #include <linux/sched.h>
12*4882a593Smuzhiyun #include <linux/libnvdimm.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/seq_buf.h>
16*4882a593Smuzhiyun #include <linux/nd.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <asm/plpar_wrappers.h>
19*4882a593Smuzhiyun #include <asm/papr_pdsm.h>
20*4882a593Smuzhiyun #include <asm/mce.h>
21*4882a593Smuzhiyun #include <asm/unaligned.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define BIND_ANY_ADDR (~0ul)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define PAPR_SCM_DIMM_CMD_MASK \
26*4882a593Smuzhiyun ((1ul << ND_CMD_GET_CONFIG_SIZE) | \
27*4882a593Smuzhiyun (1ul << ND_CMD_GET_CONFIG_DATA) | \
28*4882a593Smuzhiyun (1ul << ND_CMD_SET_CONFIG_DATA) | \
29*4882a593Smuzhiyun (1ul << ND_CMD_CALL))
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* DIMM health bitmap bitmap indicators */
32*4882a593Smuzhiyun /* SCM device is unable to persist memory contents */
33*4882a593Smuzhiyun #define PAPR_PMEM_UNARMED (1ULL << (63 - 0))
34*4882a593Smuzhiyun /* SCM device failed to persist memory contents */
35*4882a593Smuzhiyun #define PAPR_PMEM_SHUTDOWN_DIRTY (1ULL << (63 - 1))
36*4882a593Smuzhiyun /* SCM device contents are persisted from previous IPL */
37*4882a593Smuzhiyun #define PAPR_PMEM_SHUTDOWN_CLEAN (1ULL << (63 - 2))
38*4882a593Smuzhiyun /* SCM device contents are not persisted from previous IPL */
39*4882a593Smuzhiyun #define PAPR_PMEM_EMPTY (1ULL << (63 - 3))
40*4882a593Smuzhiyun /* SCM device memory life remaining is critically low */
41*4882a593Smuzhiyun #define PAPR_PMEM_HEALTH_CRITICAL (1ULL << (63 - 4))
42*4882a593Smuzhiyun /* SCM device will be garded off next IPL due to failure */
43*4882a593Smuzhiyun #define PAPR_PMEM_HEALTH_FATAL (1ULL << (63 - 5))
44*4882a593Smuzhiyun /* SCM contents cannot persist due to current platform health status */
45*4882a593Smuzhiyun #define PAPR_PMEM_HEALTH_UNHEALTHY (1ULL << (63 - 6))
46*4882a593Smuzhiyun /* SCM device is unable to persist memory contents in certain conditions */
47*4882a593Smuzhiyun #define PAPR_PMEM_HEALTH_NON_CRITICAL (1ULL << (63 - 7))
48*4882a593Smuzhiyun /* SCM device is encrypted */
49*4882a593Smuzhiyun #define PAPR_PMEM_ENCRYPTED (1ULL << (63 - 8))
50*4882a593Smuzhiyun /* SCM device has been scrubbed and locked */
51*4882a593Smuzhiyun #define PAPR_PMEM_SCRUBBED_AND_LOCKED (1ULL << (63 - 9))
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* Bits status indicators for health bitmap indicating unarmed dimm */
54*4882a593Smuzhiyun #define PAPR_PMEM_UNARMED_MASK (PAPR_PMEM_UNARMED | \
55*4882a593Smuzhiyun PAPR_PMEM_HEALTH_UNHEALTHY)
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* Bits status indicators for health bitmap indicating unflushed dimm */
58*4882a593Smuzhiyun #define PAPR_PMEM_BAD_SHUTDOWN_MASK (PAPR_PMEM_SHUTDOWN_DIRTY)
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Bits status indicators for health bitmap indicating unrestored dimm */
61*4882a593Smuzhiyun #define PAPR_PMEM_BAD_RESTORE_MASK (PAPR_PMEM_EMPTY)
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* Bit status indicators for smart event notification */
64*4882a593Smuzhiyun #define PAPR_PMEM_SMART_EVENT_MASK (PAPR_PMEM_HEALTH_CRITICAL | \
65*4882a593Smuzhiyun PAPR_PMEM_HEALTH_FATAL | \
66*4882a593Smuzhiyun PAPR_PMEM_HEALTH_UNHEALTHY)
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #define PAPR_SCM_PERF_STATS_EYECATCHER __stringify(SCMSTATS)
69*4882a593Smuzhiyun #define PAPR_SCM_PERF_STATS_VERSION 0x1
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* Struct holding a single performance metric */
72*4882a593Smuzhiyun struct papr_scm_perf_stat {
73*4882a593Smuzhiyun u8 stat_id[8];
74*4882a593Smuzhiyun __be64 stat_val;
75*4882a593Smuzhiyun } __packed;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* Struct exchanged between kernel and PHYP for fetching drc perf stats */
78*4882a593Smuzhiyun struct papr_scm_perf_stats {
79*4882a593Smuzhiyun u8 eye_catcher[8];
80*4882a593Smuzhiyun /* Should be PAPR_SCM_PERF_STATS_VERSION */
81*4882a593Smuzhiyun __be32 stats_version;
82*4882a593Smuzhiyun /* Number of stats following */
83*4882a593Smuzhiyun __be32 num_statistics;
84*4882a593Smuzhiyun /* zero or more performance matrics */
85*4882a593Smuzhiyun struct papr_scm_perf_stat scm_statistic[];
86*4882a593Smuzhiyun } __packed;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* private struct associated with each region */
89*4882a593Smuzhiyun struct papr_scm_priv {
90*4882a593Smuzhiyun struct platform_device *pdev;
91*4882a593Smuzhiyun struct device_node *dn;
92*4882a593Smuzhiyun uint32_t drc_index;
93*4882a593Smuzhiyun uint64_t blocks;
94*4882a593Smuzhiyun uint64_t block_size;
95*4882a593Smuzhiyun int metadata_size;
96*4882a593Smuzhiyun bool is_volatile;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun uint64_t bound_addr;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun struct nvdimm_bus_descriptor bus_desc;
101*4882a593Smuzhiyun struct nvdimm_bus *bus;
102*4882a593Smuzhiyun struct nvdimm *nvdimm;
103*4882a593Smuzhiyun struct resource res;
104*4882a593Smuzhiyun struct nd_region *region;
105*4882a593Smuzhiyun struct nd_interleave_set nd_set;
106*4882a593Smuzhiyun struct list_head region_list;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* Protect dimm health data from concurrent read/writes */
109*4882a593Smuzhiyun struct mutex health_mutex;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* Last time the health information of the dimm was updated */
112*4882a593Smuzhiyun unsigned long lasthealth_jiffies;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun /* Health information for the dimm */
115*4882a593Smuzhiyun u64 health_bitmap;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /* length of the stat buffer as expected by phyp */
118*4882a593Smuzhiyun size_t stat_buffer_len;
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun static LIST_HEAD(papr_nd_regions);
122*4882a593Smuzhiyun static DEFINE_MUTEX(papr_ndr_lock);
123*4882a593Smuzhiyun
drc_pmem_bind(struct papr_scm_priv * p)124*4882a593Smuzhiyun static int drc_pmem_bind(struct papr_scm_priv *p)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun unsigned long ret[PLPAR_HCALL_BUFSIZE];
127*4882a593Smuzhiyun uint64_t saved = 0;
128*4882a593Smuzhiyun uint64_t token;
129*4882a593Smuzhiyun int64_t rc;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun /*
132*4882a593Smuzhiyun * When the hypervisor cannot map all the requested memory in a single
133*4882a593Smuzhiyun * hcall it returns H_BUSY and we call again with the token until
134*4882a593Smuzhiyun * we get H_SUCCESS. Aborting the retry loop before getting H_SUCCESS
135*4882a593Smuzhiyun * leave the system in an undefined state, so we wait.
136*4882a593Smuzhiyun */
137*4882a593Smuzhiyun token = 0;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun do {
140*4882a593Smuzhiyun rc = plpar_hcall(H_SCM_BIND_MEM, ret, p->drc_index, 0,
141*4882a593Smuzhiyun p->blocks, BIND_ANY_ADDR, token);
142*4882a593Smuzhiyun token = ret[0];
143*4882a593Smuzhiyun if (!saved)
144*4882a593Smuzhiyun saved = ret[1];
145*4882a593Smuzhiyun cond_resched();
146*4882a593Smuzhiyun } while (rc == H_BUSY);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (rc)
149*4882a593Smuzhiyun return rc;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun p->bound_addr = saved;
152*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "bound drc 0x%x to 0x%lx\n",
153*4882a593Smuzhiyun p->drc_index, (unsigned long)saved);
154*4882a593Smuzhiyun return rc;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
drc_pmem_unbind(struct papr_scm_priv * p)157*4882a593Smuzhiyun static void drc_pmem_unbind(struct papr_scm_priv *p)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun unsigned long ret[PLPAR_HCALL_BUFSIZE];
160*4882a593Smuzhiyun uint64_t token = 0;
161*4882a593Smuzhiyun int64_t rc;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "unbind drc 0x%x\n", p->drc_index);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* NB: unbind has the same retry requirements as drc_pmem_bind() */
166*4882a593Smuzhiyun do {
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* Unbind of all SCM resources associated with drcIndex */
169*4882a593Smuzhiyun rc = plpar_hcall(H_SCM_UNBIND_ALL, ret, H_UNBIND_SCOPE_DRC,
170*4882a593Smuzhiyun p->drc_index, token);
171*4882a593Smuzhiyun token = ret[0];
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* Check if we are stalled for some time */
174*4882a593Smuzhiyun if (H_IS_LONG_BUSY(rc)) {
175*4882a593Smuzhiyun msleep(get_longbusy_msecs(rc));
176*4882a593Smuzhiyun rc = H_BUSY;
177*4882a593Smuzhiyun } else if (rc == H_BUSY) {
178*4882a593Smuzhiyun cond_resched();
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun } while (rc == H_BUSY);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (rc)
184*4882a593Smuzhiyun dev_err(&p->pdev->dev, "unbind error: %lld\n", rc);
185*4882a593Smuzhiyun else
186*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "unbind drc 0x%x complete\n",
187*4882a593Smuzhiyun p->drc_index);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun return;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
drc_pmem_query_n_bind(struct papr_scm_priv * p)192*4882a593Smuzhiyun static int drc_pmem_query_n_bind(struct papr_scm_priv *p)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun unsigned long start_addr;
195*4882a593Smuzhiyun unsigned long end_addr;
196*4882a593Smuzhiyun unsigned long ret[PLPAR_HCALL_BUFSIZE];
197*4882a593Smuzhiyun int64_t rc;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun rc = plpar_hcall(H_SCM_QUERY_BLOCK_MEM_BINDING, ret,
201*4882a593Smuzhiyun p->drc_index, 0);
202*4882a593Smuzhiyun if (rc)
203*4882a593Smuzhiyun goto err_out;
204*4882a593Smuzhiyun start_addr = ret[0];
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /* Make sure the full region is bound. */
207*4882a593Smuzhiyun rc = plpar_hcall(H_SCM_QUERY_BLOCK_MEM_BINDING, ret,
208*4882a593Smuzhiyun p->drc_index, p->blocks - 1);
209*4882a593Smuzhiyun if (rc)
210*4882a593Smuzhiyun goto err_out;
211*4882a593Smuzhiyun end_addr = ret[0];
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun if ((end_addr - start_addr) != ((p->blocks - 1) * p->block_size))
214*4882a593Smuzhiyun goto err_out;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun p->bound_addr = start_addr;
217*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "bound drc 0x%x to 0x%lx\n", p->drc_index, start_addr);
218*4882a593Smuzhiyun return rc;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun err_out:
221*4882a593Smuzhiyun dev_info(&p->pdev->dev,
222*4882a593Smuzhiyun "Failed to query, trying an unbind followed by bind");
223*4882a593Smuzhiyun drc_pmem_unbind(p);
224*4882a593Smuzhiyun return drc_pmem_bind(p);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /*
228*4882a593Smuzhiyun * Query the Dimm performance stats from PHYP and copy them (if returned) to
229*4882a593Smuzhiyun * provided struct papr_scm_perf_stats instance 'stats' that can hold atleast
230*4882a593Smuzhiyun * (num_stats + header) bytes.
231*4882a593Smuzhiyun * - If buff_stats == NULL the return value is the size in byes of the buffer
232*4882a593Smuzhiyun * needed to hold all supported performance-statistics.
233*4882a593Smuzhiyun * - If buff_stats != NULL and num_stats == 0 then we copy all known
234*4882a593Smuzhiyun * performance-statistics to 'buff_stat' and expect to be large enough to
235*4882a593Smuzhiyun * hold them.
236*4882a593Smuzhiyun * - if buff_stats != NULL and num_stats > 0 then copy the requested
237*4882a593Smuzhiyun * performance-statistics to buff_stats.
238*4882a593Smuzhiyun */
drc_pmem_query_stats(struct papr_scm_priv * p,struct papr_scm_perf_stats * buff_stats,unsigned int num_stats)239*4882a593Smuzhiyun static ssize_t drc_pmem_query_stats(struct papr_scm_priv *p,
240*4882a593Smuzhiyun struct papr_scm_perf_stats *buff_stats,
241*4882a593Smuzhiyun unsigned int num_stats)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun unsigned long ret[PLPAR_HCALL_BUFSIZE];
244*4882a593Smuzhiyun size_t size;
245*4882a593Smuzhiyun s64 rc;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun /* Setup the out buffer */
248*4882a593Smuzhiyun if (buff_stats) {
249*4882a593Smuzhiyun memcpy(buff_stats->eye_catcher,
250*4882a593Smuzhiyun PAPR_SCM_PERF_STATS_EYECATCHER, 8);
251*4882a593Smuzhiyun buff_stats->stats_version =
252*4882a593Smuzhiyun cpu_to_be32(PAPR_SCM_PERF_STATS_VERSION);
253*4882a593Smuzhiyun buff_stats->num_statistics =
254*4882a593Smuzhiyun cpu_to_be32(num_stats);
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /*
257*4882a593Smuzhiyun * Calculate the buffer size based on num-stats provided
258*4882a593Smuzhiyun * or use the prefetched max buffer length
259*4882a593Smuzhiyun */
260*4882a593Smuzhiyun if (num_stats)
261*4882a593Smuzhiyun /* Calculate size from the num_stats */
262*4882a593Smuzhiyun size = sizeof(struct papr_scm_perf_stats) +
263*4882a593Smuzhiyun num_stats * sizeof(struct papr_scm_perf_stat);
264*4882a593Smuzhiyun else
265*4882a593Smuzhiyun size = p->stat_buffer_len;
266*4882a593Smuzhiyun } else {
267*4882a593Smuzhiyun /* In case of no out buffer ignore the size */
268*4882a593Smuzhiyun size = 0;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* Do the HCALL asking PHYP for info */
272*4882a593Smuzhiyun rc = plpar_hcall(H_SCM_PERFORMANCE_STATS, ret, p->drc_index,
273*4882a593Smuzhiyun buff_stats ? virt_to_phys(buff_stats) : 0,
274*4882a593Smuzhiyun size);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* Check if the error was due to an unknown stat-id */
277*4882a593Smuzhiyun if (rc == H_PARTIAL) {
278*4882a593Smuzhiyun dev_err(&p->pdev->dev,
279*4882a593Smuzhiyun "Unknown performance stats, Err:0x%016lX\n", ret[0]);
280*4882a593Smuzhiyun return -ENOENT;
281*4882a593Smuzhiyun } else if (rc != H_SUCCESS) {
282*4882a593Smuzhiyun dev_err(&p->pdev->dev,
283*4882a593Smuzhiyun "Failed to query performance stats, Err:%lld\n", rc);
284*4882a593Smuzhiyun return -EIO;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun } else if (!size) {
287*4882a593Smuzhiyun /* Handle case where stat buffer size was requested */
288*4882a593Smuzhiyun dev_dbg(&p->pdev->dev,
289*4882a593Smuzhiyun "Performance stats size %ld\n", ret[0]);
290*4882a593Smuzhiyun return ret[0];
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /* Successfully fetched the requested stats from phyp */
294*4882a593Smuzhiyun dev_dbg(&p->pdev->dev,
295*4882a593Smuzhiyun "Performance stats returned %d stats\n",
296*4882a593Smuzhiyun be32_to_cpu(buff_stats->num_statistics));
297*4882a593Smuzhiyun return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun /*
301*4882a593Smuzhiyun * Issue hcall to retrieve dimm health info and populate papr_scm_priv with the
302*4882a593Smuzhiyun * health information.
303*4882a593Smuzhiyun */
__drc_pmem_query_health(struct papr_scm_priv * p)304*4882a593Smuzhiyun static int __drc_pmem_query_health(struct papr_scm_priv *p)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun unsigned long ret[PLPAR_HCALL_BUFSIZE];
307*4882a593Smuzhiyun long rc;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /* issue the hcall */
310*4882a593Smuzhiyun rc = plpar_hcall(H_SCM_HEALTH, ret, p->drc_index);
311*4882a593Smuzhiyun if (rc != H_SUCCESS) {
312*4882a593Smuzhiyun dev_err(&p->pdev->dev,
313*4882a593Smuzhiyun "Failed to query health information, Err:%ld\n", rc);
314*4882a593Smuzhiyun return -ENXIO;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun p->lasthealth_jiffies = jiffies;
318*4882a593Smuzhiyun p->health_bitmap = ret[0] & ret[1];
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun dev_dbg(&p->pdev->dev,
321*4882a593Smuzhiyun "Queried dimm health info. Bitmap:0x%016lx Mask:0x%016lx\n",
322*4882a593Smuzhiyun ret[0], ret[1]);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun return 0;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun /* Min interval in seconds for assuming stable dimm health */
328*4882a593Smuzhiyun #define MIN_HEALTH_QUERY_INTERVAL 60
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /* Query cached health info and if needed call drc_pmem_query_health */
drc_pmem_query_health(struct papr_scm_priv * p)331*4882a593Smuzhiyun static int drc_pmem_query_health(struct papr_scm_priv *p)
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun unsigned long cache_timeout;
334*4882a593Smuzhiyun int rc;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun /* Protect concurrent modifications to papr_scm_priv */
337*4882a593Smuzhiyun rc = mutex_lock_interruptible(&p->health_mutex);
338*4882a593Smuzhiyun if (rc)
339*4882a593Smuzhiyun return rc;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* Jiffies offset for which the health data is assumed to be same */
342*4882a593Smuzhiyun cache_timeout = p->lasthealth_jiffies +
343*4882a593Smuzhiyun msecs_to_jiffies(MIN_HEALTH_QUERY_INTERVAL * 1000);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /* Fetch new health info is its older than MIN_HEALTH_QUERY_INTERVAL */
346*4882a593Smuzhiyun if (time_after(jiffies, cache_timeout))
347*4882a593Smuzhiyun rc = __drc_pmem_query_health(p);
348*4882a593Smuzhiyun else
349*4882a593Smuzhiyun /* Assume cached health data is valid */
350*4882a593Smuzhiyun rc = 0;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun mutex_unlock(&p->health_mutex);
353*4882a593Smuzhiyun return rc;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
papr_scm_meta_get(struct papr_scm_priv * p,struct nd_cmd_get_config_data_hdr * hdr)356*4882a593Smuzhiyun static int papr_scm_meta_get(struct papr_scm_priv *p,
357*4882a593Smuzhiyun struct nd_cmd_get_config_data_hdr *hdr)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun unsigned long data[PLPAR_HCALL_BUFSIZE];
360*4882a593Smuzhiyun unsigned long offset, data_offset;
361*4882a593Smuzhiyun int len, read;
362*4882a593Smuzhiyun int64_t ret;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun if ((hdr->in_offset + hdr->in_length) > p->metadata_size)
365*4882a593Smuzhiyun return -EINVAL;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun for (len = hdr->in_length; len; len -= read) {
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun data_offset = hdr->in_length - len;
370*4882a593Smuzhiyun offset = hdr->in_offset + data_offset;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun if (len >= 8)
373*4882a593Smuzhiyun read = 8;
374*4882a593Smuzhiyun else if (len >= 4)
375*4882a593Smuzhiyun read = 4;
376*4882a593Smuzhiyun else if (len >= 2)
377*4882a593Smuzhiyun read = 2;
378*4882a593Smuzhiyun else
379*4882a593Smuzhiyun read = 1;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun ret = plpar_hcall(H_SCM_READ_METADATA, data, p->drc_index,
382*4882a593Smuzhiyun offset, read);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun if (ret == H_PARAMETER) /* bad DRC index */
385*4882a593Smuzhiyun return -ENODEV;
386*4882a593Smuzhiyun if (ret)
387*4882a593Smuzhiyun return -EINVAL; /* other invalid parameter */
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun switch (read) {
390*4882a593Smuzhiyun case 8:
391*4882a593Smuzhiyun *(uint64_t *)(hdr->out_buf + data_offset) = be64_to_cpu(data[0]);
392*4882a593Smuzhiyun break;
393*4882a593Smuzhiyun case 4:
394*4882a593Smuzhiyun *(uint32_t *)(hdr->out_buf + data_offset) = be32_to_cpu(data[0] & 0xffffffff);
395*4882a593Smuzhiyun break;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun case 2:
398*4882a593Smuzhiyun *(uint16_t *)(hdr->out_buf + data_offset) = be16_to_cpu(data[0] & 0xffff);
399*4882a593Smuzhiyun break;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun case 1:
402*4882a593Smuzhiyun *(uint8_t *)(hdr->out_buf + data_offset) = (data[0] & 0xff);
403*4882a593Smuzhiyun break;
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun return 0;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun
papr_scm_meta_set(struct papr_scm_priv * p,struct nd_cmd_set_config_hdr * hdr)409*4882a593Smuzhiyun static int papr_scm_meta_set(struct papr_scm_priv *p,
410*4882a593Smuzhiyun struct nd_cmd_set_config_hdr *hdr)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun unsigned long offset, data_offset;
413*4882a593Smuzhiyun int len, wrote;
414*4882a593Smuzhiyun unsigned long data;
415*4882a593Smuzhiyun __be64 data_be;
416*4882a593Smuzhiyun int64_t ret;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun if ((hdr->in_offset + hdr->in_length) > p->metadata_size)
419*4882a593Smuzhiyun return -EINVAL;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun for (len = hdr->in_length; len; len -= wrote) {
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun data_offset = hdr->in_length - len;
424*4882a593Smuzhiyun offset = hdr->in_offset + data_offset;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun if (len >= 8) {
427*4882a593Smuzhiyun data = *(uint64_t *)(hdr->in_buf + data_offset);
428*4882a593Smuzhiyun data_be = cpu_to_be64(data);
429*4882a593Smuzhiyun wrote = 8;
430*4882a593Smuzhiyun } else if (len >= 4) {
431*4882a593Smuzhiyun data = *(uint32_t *)(hdr->in_buf + data_offset);
432*4882a593Smuzhiyun data &= 0xffffffff;
433*4882a593Smuzhiyun data_be = cpu_to_be32(data);
434*4882a593Smuzhiyun wrote = 4;
435*4882a593Smuzhiyun } else if (len >= 2) {
436*4882a593Smuzhiyun data = *(uint16_t *)(hdr->in_buf + data_offset);
437*4882a593Smuzhiyun data &= 0xffff;
438*4882a593Smuzhiyun data_be = cpu_to_be16(data);
439*4882a593Smuzhiyun wrote = 2;
440*4882a593Smuzhiyun } else {
441*4882a593Smuzhiyun data_be = *(uint8_t *)(hdr->in_buf + data_offset);
442*4882a593Smuzhiyun data_be &= 0xff;
443*4882a593Smuzhiyun wrote = 1;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun ret = plpar_hcall_norets(H_SCM_WRITE_METADATA, p->drc_index,
447*4882a593Smuzhiyun offset, data_be, wrote);
448*4882a593Smuzhiyun if (ret == H_PARAMETER) /* bad DRC index */
449*4882a593Smuzhiyun return -ENODEV;
450*4882a593Smuzhiyun if (ret)
451*4882a593Smuzhiyun return -EINVAL; /* other invalid parameter */
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun return 0;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun /*
458*4882a593Smuzhiyun * Do a sanity checks on the inputs args to dimm-control function and return
459*4882a593Smuzhiyun * '0' if valid. Validation of PDSM payloads happens later in
460*4882a593Smuzhiyun * papr_scm_service_pdsm.
461*4882a593Smuzhiyun */
is_cmd_valid(struct nvdimm * nvdimm,unsigned int cmd,void * buf,unsigned int buf_len)462*4882a593Smuzhiyun static int is_cmd_valid(struct nvdimm *nvdimm, unsigned int cmd, void *buf,
463*4882a593Smuzhiyun unsigned int buf_len)
464*4882a593Smuzhiyun {
465*4882a593Smuzhiyun unsigned long cmd_mask = PAPR_SCM_DIMM_CMD_MASK;
466*4882a593Smuzhiyun struct nd_cmd_pkg *nd_cmd;
467*4882a593Smuzhiyun struct papr_scm_priv *p;
468*4882a593Smuzhiyun enum papr_pdsm pdsm;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun /* Only dimm-specific calls are supported atm */
471*4882a593Smuzhiyun if (!nvdimm)
472*4882a593Smuzhiyun return -EINVAL;
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun /* get the provider data from struct nvdimm */
475*4882a593Smuzhiyun p = nvdimm_provider_data(nvdimm);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun if (!test_bit(cmd, &cmd_mask)) {
478*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "Unsupported cmd=%u\n", cmd);
479*4882a593Smuzhiyun return -EINVAL;
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun /* For CMD_CALL verify pdsm request */
483*4882a593Smuzhiyun if (cmd == ND_CMD_CALL) {
484*4882a593Smuzhiyun /* Verify the envelope and envelop size */
485*4882a593Smuzhiyun if (!buf ||
486*4882a593Smuzhiyun buf_len < (sizeof(struct nd_cmd_pkg) + ND_PDSM_HDR_SIZE)) {
487*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "Invalid pkg size=%u\n",
488*4882a593Smuzhiyun buf_len);
489*4882a593Smuzhiyun return -EINVAL;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun /* Verify that the nd_cmd_pkg.nd_family is correct */
493*4882a593Smuzhiyun nd_cmd = (struct nd_cmd_pkg *)buf;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun if (nd_cmd->nd_family != NVDIMM_FAMILY_PAPR) {
496*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "Invalid pkg family=0x%llx\n",
497*4882a593Smuzhiyun nd_cmd->nd_family);
498*4882a593Smuzhiyun return -EINVAL;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun pdsm = (enum papr_pdsm)nd_cmd->nd_command;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun /* Verify if the pdsm command is valid */
504*4882a593Smuzhiyun if (pdsm <= PAPR_PDSM_MIN || pdsm >= PAPR_PDSM_MAX) {
505*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "PDSM[0x%x]: Invalid PDSM\n",
506*4882a593Smuzhiyun pdsm);
507*4882a593Smuzhiyun return -EINVAL;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun /* Have enough space to hold returned 'nd_pkg_pdsm' header */
511*4882a593Smuzhiyun if (nd_cmd->nd_size_out < ND_PDSM_HDR_SIZE) {
512*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "PDSM[0x%x]: Invalid payload\n",
513*4882a593Smuzhiyun pdsm);
514*4882a593Smuzhiyun return -EINVAL;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun /* Let the command be further processed */
519*4882a593Smuzhiyun return 0;
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun
papr_pdsm_fuel_gauge(struct papr_scm_priv * p,union nd_pdsm_payload * payload)522*4882a593Smuzhiyun static int papr_pdsm_fuel_gauge(struct papr_scm_priv *p,
523*4882a593Smuzhiyun union nd_pdsm_payload *payload)
524*4882a593Smuzhiyun {
525*4882a593Smuzhiyun int rc, size;
526*4882a593Smuzhiyun u64 statval;
527*4882a593Smuzhiyun struct papr_scm_perf_stat *stat;
528*4882a593Smuzhiyun struct papr_scm_perf_stats *stats;
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun /* Silently fail if fetching performance metrics isn't supported */
531*4882a593Smuzhiyun if (!p->stat_buffer_len)
532*4882a593Smuzhiyun return 0;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun /* Allocate request buffer enough to hold single performance stat */
535*4882a593Smuzhiyun size = sizeof(struct papr_scm_perf_stats) +
536*4882a593Smuzhiyun sizeof(struct papr_scm_perf_stat);
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun stats = kzalloc(size, GFP_KERNEL);
539*4882a593Smuzhiyun if (!stats)
540*4882a593Smuzhiyun return -ENOMEM;
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun stat = &stats->scm_statistic[0];
543*4882a593Smuzhiyun memcpy(&stat->stat_id, "MemLife ", sizeof(stat->stat_id));
544*4882a593Smuzhiyun stat->stat_val = 0;
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun /* Fetch the fuel gauge and populate it in payload */
547*4882a593Smuzhiyun rc = drc_pmem_query_stats(p, stats, 1);
548*4882a593Smuzhiyun if (rc < 0) {
549*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "Err(%d) fetching fuel gauge\n", rc);
550*4882a593Smuzhiyun goto free_stats;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun statval = be64_to_cpu(stat->stat_val);
554*4882a593Smuzhiyun dev_dbg(&p->pdev->dev,
555*4882a593Smuzhiyun "Fetched fuel-gauge %llu", statval);
556*4882a593Smuzhiyun payload->health.extension_flags |=
557*4882a593Smuzhiyun PDSM_DIMM_HEALTH_RUN_GAUGE_VALID;
558*4882a593Smuzhiyun payload->health.dimm_fuel_gauge = statval;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun rc = sizeof(struct nd_papr_pdsm_health);
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun free_stats:
563*4882a593Smuzhiyun kfree(stats);
564*4882a593Smuzhiyun return rc;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun /* Fetch the DIMM health info and populate it in provided package. */
papr_pdsm_health(struct papr_scm_priv * p,union nd_pdsm_payload * payload)568*4882a593Smuzhiyun static int papr_pdsm_health(struct papr_scm_priv *p,
569*4882a593Smuzhiyun union nd_pdsm_payload *payload)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun int rc;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun /* Ensure dimm health mutex is taken preventing concurrent access */
574*4882a593Smuzhiyun rc = mutex_lock_interruptible(&p->health_mutex);
575*4882a593Smuzhiyun if (rc)
576*4882a593Smuzhiyun goto out;
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun /* Always fetch upto date dimm health data ignoring cached values */
579*4882a593Smuzhiyun rc = __drc_pmem_query_health(p);
580*4882a593Smuzhiyun if (rc) {
581*4882a593Smuzhiyun mutex_unlock(&p->health_mutex);
582*4882a593Smuzhiyun goto out;
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun /* update health struct with various flags derived from health bitmap */
586*4882a593Smuzhiyun payload->health = (struct nd_papr_pdsm_health) {
587*4882a593Smuzhiyun .extension_flags = 0,
588*4882a593Smuzhiyun .dimm_unarmed = !!(p->health_bitmap & PAPR_PMEM_UNARMED_MASK),
589*4882a593Smuzhiyun .dimm_bad_shutdown = !!(p->health_bitmap & PAPR_PMEM_BAD_SHUTDOWN_MASK),
590*4882a593Smuzhiyun .dimm_bad_restore = !!(p->health_bitmap & PAPR_PMEM_BAD_RESTORE_MASK),
591*4882a593Smuzhiyun .dimm_scrubbed = !!(p->health_bitmap & PAPR_PMEM_SCRUBBED_AND_LOCKED),
592*4882a593Smuzhiyun .dimm_locked = !!(p->health_bitmap & PAPR_PMEM_SCRUBBED_AND_LOCKED),
593*4882a593Smuzhiyun .dimm_encrypted = !!(p->health_bitmap & PAPR_PMEM_ENCRYPTED),
594*4882a593Smuzhiyun .dimm_health = PAPR_PDSM_DIMM_HEALTHY,
595*4882a593Smuzhiyun };
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun /* Update field dimm_health based on health_bitmap flags */
598*4882a593Smuzhiyun if (p->health_bitmap & PAPR_PMEM_HEALTH_FATAL)
599*4882a593Smuzhiyun payload->health.dimm_health = PAPR_PDSM_DIMM_FATAL;
600*4882a593Smuzhiyun else if (p->health_bitmap & PAPR_PMEM_HEALTH_CRITICAL)
601*4882a593Smuzhiyun payload->health.dimm_health = PAPR_PDSM_DIMM_CRITICAL;
602*4882a593Smuzhiyun else if (p->health_bitmap & PAPR_PMEM_HEALTH_UNHEALTHY)
603*4882a593Smuzhiyun payload->health.dimm_health = PAPR_PDSM_DIMM_UNHEALTHY;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun /* struct populated hence can release the mutex now */
606*4882a593Smuzhiyun mutex_unlock(&p->health_mutex);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun /* Populate the fuel gauge meter in the payload */
609*4882a593Smuzhiyun papr_pdsm_fuel_gauge(p, payload);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun rc = sizeof(struct nd_papr_pdsm_health);
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun out:
614*4882a593Smuzhiyun return rc;
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun /*
618*4882a593Smuzhiyun * 'struct pdsm_cmd_desc'
619*4882a593Smuzhiyun * Identifies supported PDSMs' expected length of in/out payloads
620*4882a593Smuzhiyun * and pdsm service function.
621*4882a593Smuzhiyun *
622*4882a593Smuzhiyun * size_in : Size of input payload if any in the PDSM request.
623*4882a593Smuzhiyun * size_out : Size of output payload if any in the PDSM request.
624*4882a593Smuzhiyun * service : Service function for the PDSM request. Return semantics:
625*4882a593Smuzhiyun * rc < 0 : Error servicing PDSM and rc indicates the error.
626*4882a593Smuzhiyun * rc >=0 : Serviced successfully and 'rc' indicate number of
627*4882a593Smuzhiyun * bytes written to payload.
628*4882a593Smuzhiyun */
629*4882a593Smuzhiyun struct pdsm_cmd_desc {
630*4882a593Smuzhiyun u32 size_in;
631*4882a593Smuzhiyun u32 size_out;
632*4882a593Smuzhiyun int (*service)(struct papr_scm_priv *dimm,
633*4882a593Smuzhiyun union nd_pdsm_payload *payload);
634*4882a593Smuzhiyun };
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun /* Holds all supported PDSMs' command descriptors */
637*4882a593Smuzhiyun static const struct pdsm_cmd_desc __pdsm_cmd_descriptors[] = {
638*4882a593Smuzhiyun [PAPR_PDSM_MIN] = {
639*4882a593Smuzhiyun .size_in = 0,
640*4882a593Smuzhiyun .size_out = 0,
641*4882a593Smuzhiyun .service = NULL,
642*4882a593Smuzhiyun },
643*4882a593Smuzhiyun /* New PDSM command descriptors to be added below */
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun [PAPR_PDSM_HEALTH] = {
646*4882a593Smuzhiyun .size_in = 0,
647*4882a593Smuzhiyun .size_out = sizeof(struct nd_papr_pdsm_health),
648*4882a593Smuzhiyun .service = papr_pdsm_health,
649*4882a593Smuzhiyun },
650*4882a593Smuzhiyun /* Empty */
651*4882a593Smuzhiyun [PAPR_PDSM_MAX] = {
652*4882a593Smuzhiyun .size_in = 0,
653*4882a593Smuzhiyun .size_out = 0,
654*4882a593Smuzhiyun .service = NULL,
655*4882a593Smuzhiyun },
656*4882a593Smuzhiyun };
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun /* Given a valid pdsm cmd return its command descriptor else return NULL */
pdsm_cmd_desc(enum papr_pdsm cmd)659*4882a593Smuzhiyun static inline const struct pdsm_cmd_desc *pdsm_cmd_desc(enum papr_pdsm cmd)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun if (cmd >= 0 || cmd < ARRAY_SIZE(__pdsm_cmd_descriptors))
662*4882a593Smuzhiyun return &__pdsm_cmd_descriptors[cmd];
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun return NULL;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun /*
668*4882a593Smuzhiyun * For a given pdsm request call an appropriate service function.
669*4882a593Smuzhiyun * Returns errors if any while handling the pdsm command package.
670*4882a593Smuzhiyun */
papr_scm_service_pdsm(struct papr_scm_priv * p,struct nd_cmd_pkg * pkg)671*4882a593Smuzhiyun static int papr_scm_service_pdsm(struct papr_scm_priv *p,
672*4882a593Smuzhiyun struct nd_cmd_pkg *pkg)
673*4882a593Smuzhiyun {
674*4882a593Smuzhiyun /* Get the PDSM header and PDSM command */
675*4882a593Smuzhiyun struct nd_pkg_pdsm *pdsm_pkg = (struct nd_pkg_pdsm *)pkg->nd_payload;
676*4882a593Smuzhiyun enum papr_pdsm pdsm = (enum papr_pdsm)pkg->nd_command;
677*4882a593Smuzhiyun const struct pdsm_cmd_desc *pdsc;
678*4882a593Smuzhiyun int rc;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun /* Fetch corresponding pdsm descriptor for validation and servicing */
681*4882a593Smuzhiyun pdsc = pdsm_cmd_desc(pdsm);
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun /* Validate pdsm descriptor */
684*4882a593Smuzhiyun /* Ensure that reserved fields are 0 */
685*4882a593Smuzhiyun if (pdsm_pkg->reserved[0] || pdsm_pkg->reserved[1]) {
686*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "PDSM[0x%x]: Invalid reserved field\n",
687*4882a593Smuzhiyun pdsm);
688*4882a593Smuzhiyun return -EINVAL;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun /* If pdsm expects some input, then ensure that the size_in matches */
692*4882a593Smuzhiyun if (pdsc->size_in &&
693*4882a593Smuzhiyun pkg->nd_size_in != (pdsc->size_in + ND_PDSM_HDR_SIZE)) {
694*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "PDSM[0x%x]: Mismatched size_in=%d\n",
695*4882a593Smuzhiyun pdsm, pkg->nd_size_in);
696*4882a593Smuzhiyun return -EINVAL;
697*4882a593Smuzhiyun }
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun /* If pdsm wants to return data, then ensure that size_out matches */
700*4882a593Smuzhiyun if (pdsc->size_out &&
701*4882a593Smuzhiyun pkg->nd_size_out != (pdsc->size_out + ND_PDSM_HDR_SIZE)) {
702*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "PDSM[0x%x]: Mismatched size_out=%d\n",
703*4882a593Smuzhiyun pdsm, pkg->nd_size_out);
704*4882a593Smuzhiyun return -EINVAL;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun /* Service the pdsm */
708*4882a593Smuzhiyun if (pdsc->service) {
709*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "PDSM[0x%x]: Servicing..\n", pdsm);
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun rc = pdsc->service(p, &pdsm_pkg->payload);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun if (rc < 0) {
714*4882a593Smuzhiyun /* error encountered while servicing pdsm */
715*4882a593Smuzhiyun pdsm_pkg->cmd_status = rc;
716*4882a593Smuzhiyun pkg->nd_fw_size = ND_PDSM_HDR_SIZE;
717*4882a593Smuzhiyun } else {
718*4882a593Smuzhiyun /* pdsm serviced and 'rc' bytes written to payload */
719*4882a593Smuzhiyun pdsm_pkg->cmd_status = 0;
720*4882a593Smuzhiyun pkg->nd_fw_size = ND_PDSM_HDR_SIZE + rc;
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun } else {
723*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "PDSM[0x%x]: Unsupported PDSM request\n",
724*4882a593Smuzhiyun pdsm);
725*4882a593Smuzhiyun pdsm_pkg->cmd_status = -ENOENT;
726*4882a593Smuzhiyun pkg->nd_fw_size = ND_PDSM_HDR_SIZE;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun return pdsm_pkg->cmd_status;
730*4882a593Smuzhiyun }
731*4882a593Smuzhiyun
papr_scm_ndctl(struct nvdimm_bus_descriptor * nd_desc,struct nvdimm * nvdimm,unsigned int cmd,void * buf,unsigned int buf_len,int * cmd_rc)732*4882a593Smuzhiyun static int papr_scm_ndctl(struct nvdimm_bus_descriptor *nd_desc,
733*4882a593Smuzhiyun struct nvdimm *nvdimm, unsigned int cmd, void *buf,
734*4882a593Smuzhiyun unsigned int buf_len, int *cmd_rc)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun struct nd_cmd_get_config_size *get_size_hdr;
737*4882a593Smuzhiyun struct nd_cmd_pkg *call_pkg = NULL;
738*4882a593Smuzhiyun struct papr_scm_priv *p;
739*4882a593Smuzhiyun int rc;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun rc = is_cmd_valid(nvdimm, cmd, buf, buf_len);
742*4882a593Smuzhiyun if (rc) {
743*4882a593Smuzhiyun pr_debug("Invalid cmd=0x%x. Err=%d\n", cmd, rc);
744*4882a593Smuzhiyun return rc;
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun /* Use a local variable in case cmd_rc pointer is NULL */
748*4882a593Smuzhiyun if (!cmd_rc)
749*4882a593Smuzhiyun cmd_rc = &rc;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun p = nvdimm_provider_data(nvdimm);
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun switch (cmd) {
754*4882a593Smuzhiyun case ND_CMD_GET_CONFIG_SIZE:
755*4882a593Smuzhiyun get_size_hdr = buf;
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun get_size_hdr->status = 0;
758*4882a593Smuzhiyun get_size_hdr->max_xfer = 8;
759*4882a593Smuzhiyun get_size_hdr->config_size = p->metadata_size;
760*4882a593Smuzhiyun *cmd_rc = 0;
761*4882a593Smuzhiyun break;
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun case ND_CMD_GET_CONFIG_DATA:
764*4882a593Smuzhiyun *cmd_rc = papr_scm_meta_get(p, buf);
765*4882a593Smuzhiyun break;
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun case ND_CMD_SET_CONFIG_DATA:
768*4882a593Smuzhiyun *cmd_rc = papr_scm_meta_set(p, buf);
769*4882a593Smuzhiyun break;
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun case ND_CMD_CALL:
772*4882a593Smuzhiyun call_pkg = (struct nd_cmd_pkg *)buf;
773*4882a593Smuzhiyun *cmd_rc = papr_scm_service_pdsm(p, call_pkg);
774*4882a593Smuzhiyun break;
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun default:
777*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "Unknown command = %d\n", cmd);
778*4882a593Smuzhiyun return -EINVAL;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "returned with cmd_rc = %d\n", *cmd_rc);
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun return 0;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
perf_stats_show(struct device * dev,struct device_attribute * attr,char * buf)786*4882a593Smuzhiyun static ssize_t perf_stats_show(struct device *dev,
787*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
788*4882a593Smuzhiyun {
789*4882a593Smuzhiyun int index;
790*4882a593Smuzhiyun ssize_t rc;
791*4882a593Smuzhiyun struct seq_buf s;
792*4882a593Smuzhiyun struct papr_scm_perf_stat *stat;
793*4882a593Smuzhiyun struct papr_scm_perf_stats *stats;
794*4882a593Smuzhiyun struct nvdimm *dimm = to_nvdimm(dev);
795*4882a593Smuzhiyun struct papr_scm_priv *p = nvdimm_provider_data(dimm);
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun if (!p->stat_buffer_len)
798*4882a593Smuzhiyun return -ENOENT;
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun /* Allocate the buffer for phyp where stats are written */
801*4882a593Smuzhiyun stats = kzalloc(p->stat_buffer_len, GFP_KERNEL);
802*4882a593Smuzhiyun if (!stats)
803*4882a593Smuzhiyun return -ENOMEM;
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun /* Ask phyp to return all dimm perf stats */
806*4882a593Smuzhiyun rc = drc_pmem_query_stats(p, stats, 0);
807*4882a593Smuzhiyun if (rc)
808*4882a593Smuzhiyun goto free_stats;
809*4882a593Smuzhiyun /*
810*4882a593Smuzhiyun * Go through the returned output buffer and print stats and
811*4882a593Smuzhiyun * values. Since stat_id is essentially a char string of
812*4882a593Smuzhiyun * 8 bytes, simply use the string format specifier to print it.
813*4882a593Smuzhiyun */
814*4882a593Smuzhiyun seq_buf_init(&s, buf, PAGE_SIZE);
815*4882a593Smuzhiyun for (index = 0, stat = stats->scm_statistic;
816*4882a593Smuzhiyun index < be32_to_cpu(stats->num_statistics);
817*4882a593Smuzhiyun ++index, ++stat) {
818*4882a593Smuzhiyun seq_buf_printf(&s, "%.8s = 0x%016llX\n",
819*4882a593Smuzhiyun stat->stat_id,
820*4882a593Smuzhiyun be64_to_cpu(stat->stat_val));
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun free_stats:
824*4882a593Smuzhiyun kfree(stats);
825*4882a593Smuzhiyun return rc ? rc : (ssize_t)seq_buf_used(&s);
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun static DEVICE_ATTR_ADMIN_RO(perf_stats);
828*4882a593Smuzhiyun
flags_show(struct device * dev,struct device_attribute * attr,char * buf)829*4882a593Smuzhiyun static ssize_t flags_show(struct device *dev,
830*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
831*4882a593Smuzhiyun {
832*4882a593Smuzhiyun struct nvdimm *dimm = to_nvdimm(dev);
833*4882a593Smuzhiyun struct papr_scm_priv *p = nvdimm_provider_data(dimm);
834*4882a593Smuzhiyun struct seq_buf s;
835*4882a593Smuzhiyun u64 health;
836*4882a593Smuzhiyun int rc;
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun rc = drc_pmem_query_health(p);
839*4882a593Smuzhiyun if (rc)
840*4882a593Smuzhiyun return rc;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun /* Copy health_bitmap locally, check masks & update out buffer */
843*4882a593Smuzhiyun health = READ_ONCE(p->health_bitmap);
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun seq_buf_init(&s, buf, PAGE_SIZE);
846*4882a593Smuzhiyun if (health & PAPR_PMEM_UNARMED_MASK)
847*4882a593Smuzhiyun seq_buf_printf(&s, "not_armed ");
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun if (health & PAPR_PMEM_BAD_SHUTDOWN_MASK)
850*4882a593Smuzhiyun seq_buf_printf(&s, "flush_fail ");
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun if (health & PAPR_PMEM_BAD_RESTORE_MASK)
853*4882a593Smuzhiyun seq_buf_printf(&s, "restore_fail ");
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun if (health & PAPR_PMEM_ENCRYPTED)
856*4882a593Smuzhiyun seq_buf_printf(&s, "encrypted ");
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun if (health & PAPR_PMEM_SMART_EVENT_MASK)
859*4882a593Smuzhiyun seq_buf_printf(&s, "smart_notify ");
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun if (health & PAPR_PMEM_SCRUBBED_AND_LOCKED)
862*4882a593Smuzhiyun seq_buf_printf(&s, "scrubbed locked ");
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun if (seq_buf_used(&s))
865*4882a593Smuzhiyun seq_buf_printf(&s, "\n");
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun return seq_buf_used(&s);
868*4882a593Smuzhiyun }
869*4882a593Smuzhiyun DEVICE_ATTR_RO(flags);
870*4882a593Smuzhiyun
papr_nd_attribute_visible(struct kobject * kobj,struct attribute * attr,int n)871*4882a593Smuzhiyun static umode_t papr_nd_attribute_visible(struct kobject *kobj,
872*4882a593Smuzhiyun struct attribute *attr, int n)
873*4882a593Smuzhiyun {
874*4882a593Smuzhiyun struct device *dev = kobj_to_dev(kobj);
875*4882a593Smuzhiyun struct nvdimm *nvdimm = to_nvdimm(dev);
876*4882a593Smuzhiyun struct papr_scm_priv *p = nvdimm_provider_data(nvdimm);
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun /* For if perf-stats not available remove perf_stats sysfs */
879*4882a593Smuzhiyun if (attr == &dev_attr_perf_stats.attr && p->stat_buffer_len == 0)
880*4882a593Smuzhiyun return 0;
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun return attr->mode;
883*4882a593Smuzhiyun }
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun /* papr_scm specific dimm attributes */
886*4882a593Smuzhiyun static struct attribute *papr_nd_attributes[] = {
887*4882a593Smuzhiyun &dev_attr_flags.attr,
888*4882a593Smuzhiyun &dev_attr_perf_stats.attr,
889*4882a593Smuzhiyun NULL,
890*4882a593Smuzhiyun };
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun static struct attribute_group papr_nd_attribute_group = {
893*4882a593Smuzhiyun .name = "papr",
894*4882a593Smuzhiyun .is_visible = papr_nd_attribute_visible,
895*4882a593Smuzhiyun .attrs = papr_nd_attributes,
896*4882a593Smuzhiyun };
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun static const struct attribute_group *papr_nd_attr_groups[] = {
899*4882a593Smuzhiyun &papr_nd_attribute_group,
900*4882a593Smuzhiyun NULL,
901*4882a593Smuzhiyun };
902*4882a593Smuzhiyun
papr_scm_nvdimm_init(struct papr_scm_priv * p)903*4882a593Smuzhiyun static int papr_scm_nvdimm_init(struct papr_scm_priv *p)
904*4882a593Smuzhiyun {
905*4882a593Smuzhiyun struct device *dev = &p->pdev->dev;
906*4882a593Smuzhiyun struct nd_mapping_desc mapping;
907*4882a593Smuzhiyun struct nd_region_desc ndr_desc;
908*4882a593Smuzhiyun unsigned long dimm_flags;
909*4882a593Smuzhiyun int target_nid, online_nid;
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun p->bus_desc.ndctl = papr_scm_ndctl;
912*4882a593Smuzhiyun p->bus_desc.module = THIS_MODULE;
913*4882a593Smuzhiyun p->bus_desc.of_node = p->pdev->dev.of_node;
914*4882a593Smuzhiyun p->bus_desc.provider_name = kstrdup(p->pdev->name, GFP_KERNEL);
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun /* Set the dimm command family mask to accept PDSMs */
917*4882a593Smuzhiyun set_bit(NVDIMM_FAMILY_PAPR, &p->bus_desc.dimm_family_mask);
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun if (!p->bus_desc.provider_name)
920*4882a593Smuzhiyun return -ENOMEM;
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun p->bus = nvdimm_bus_register(NULL, &p->bus_desc);
923*4882a593Smuzhiyun if (!p->bus) {
924*4882a593Smuzhiyun dev_err(dev, "Error creating nvdimm bus %pOF\n", p->dn);
925*4882a593Smuzhiyun kfree(p->bus_desc.provider_name);
926*4882a593Smuzhiyun return -ENXIO;
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun dimm_flags = 0;
930*4882a593Smuzhiyun set_bit(NDD_LABELING, &dimm_flags);
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun p->nvdimm = nvdimm_create(p->bus, p, papr_nd_attr_groups,
933*4882a593Smuzhiyun dimm_flags, PAPR_SCM_DIMM_CMD_MASK, 0, NULL);
934*4882a593Smuzhiyun if (!p->nvdimm) {
935*4882a593Smuzhiyun dev_err(dev, "Error creating DIMM object for %pOF\n", p->dn);
936*4882a593Smuzhiyun goto err;
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun if (nvdimm_bus_check_dimm_count(p->bus, 1))
940*4882a593Smuzhiyun goto err;
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun /* now add the region */
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun memset(&mapping, 0, sizeof(mapping));
945*4882a593Smuzhiyun mapping.nvdimm = p->nvdimm;
946*4882a593Smuzhiyun mapping.start = 0;
947*4882a593Smuzhiyun mapping.size = p->blocks * p->block_size; // XXX: potential overflow?
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun memset(&ndr_desc, 0, sizeof(ndr_desc));
950*4882a593Smuzhiyun target_nid = dev_to_node(&p->pdev->dev);
951*4882a593Smuzhiyun online_nid = numa_map_to_online_node(target_nid);
952*4882a593Smuzhiyun ndr_desc.numa_node = online_nid;
953*4882a593Smuzhiyun ndr_desc.target_node = target_nid;
954*4882a593Smuzhiyun ndr_desc.res = &p->res;
955*4882a593Smuzhiyun ndr_desc.of_node = p->dn;
956*4882a593Smuzhiyun ndr_desc.provider_data = p;
957*4882a593Smuzhiyun ndr_desc.mapping = &mapping;
958*4882a593Smuzhiyun ndr_desc.num_mappings = 1;
959*4882a593Smuzhiyun ndr_desc.nd_set = &p->nd_set;
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun if (p->is_volatile)
962*4882a593Smuzhiyun p->region = nvdimm_volatile_region_create(p->bus, &ndr_desc);
963*4882a593Smuzhiyun else {
964*4882a593Smuzhiyun set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc.flags);
965*4882a593Smuzhiyun p->region = nvdimm_pmem_region_create(p->bus, &ndr_desc);
966*4882a593Smuzhiyun }
967*4882a593Smuzhiyun if (!p->region) {
968*4882a593Smuzhiyun dev_err(dev, "Error registering region %pR from %pOF\n",
969*4882a593Smuzhiyun ndr_desc.res, p->dn);
970*4882a593Smuzhiyun goto err;
971*4882a593Smuzhiyun }
972*4882a593Smuzhiyun if (target_nid != online_nid)
973*4882a593Smuzhiyun dev_info(dev, "Region registered with target node %d and online node %d",
974*4882a593Smuzhiyun target_nid, online_nid);
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun mutex_lock(&papr_ndr_lock);
977*4882a593Smuzhiyun list_add_tail(&p->region_list, &papr_nd_regions);
978*4882a593Smuzhiyun mutex_unlock(&papr_ndr_lock);
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun return 0;
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun err: nvdimm_bus_unregister(p->bus);
983*4882a593Smuzhiyun kfree(p->bus_desc.provider_name);
984*4882a593Smuzhiyun return -ENXIO;
985*4882a593Smuzhiyun }
986*4882a593Smuzhiyun
papr_scm_add_badblock(struct nd_region * region,struct nvdimm_bus * bus,u64 phys_addr)987*4882a593Smuzhiyun static void papr_scm_add_badblock(struct nd_region *region,
988*4882a593Smuzhiyun struct nvdimm_bus *bus, u64 phys_addr)
989*4882a593Smuzhiyun {
990*4882a593Smuzhiyun u64 aligned_addr = ALIGN_DOWN(phys_addr, L1_CACHE_BYTES);
991*4882a593Smuzhiyun
992*4882a593Smuzhiyun if (nvdimm_bus_add_badrange(bus, aligned_addr, L1_CACHE_BYTES)) {
993*4882a593Smuzhiyun pr_err("Bad block registration for 0x%llx failed\n", phys_addr);
994*4882a593Smuzhiyun return;
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun pr_debug("Add memory range (0x%llx - 0x%llx) as bad range\n",
998*4882a593Smuzhiyun aligned_addr, aligned_addr + L1_CACHE_BYTES);
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun nvdimm_region_notify(region, NVDIMM_REVALIDATE_POISON);
1001*4882a593Smuzhiyun }
1002*4882a593Smuzhiyun
handle_mce_ue(struct notifier_block * nb,unsigned long val,void * data)1003*4882a593Smuzhiyun static int handle_mce_ue(struct notifier_block *nb, unsigned long val,
1004*4882a593Smuzhiyun void *data)
1005*4882a593Smuzhiyun {
1006*4882a593Smuzhiyun struct machine_check_event *evt = data;
1007*4882a593Smuzhiyun struct papr_scm_priv *p;
1008*4882a593Smuzhiyun u64 phys_addr;
1009*4882a593Smuzhiyun bool found = false;
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun if (evt->error_type != MCE_ERROR_TYPE_UE)
1012*4882a593Smuzhiyun return NOTIFY_DONE;
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun if (list_empty(&papr_nd_regions))
1015*4882a593Smuzhiyun return NOTIFY_DONE;
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun /*
1018*4882a593Smuzhiyun * The physical address obtained here is PAGE_SIZE aligned, so get the
1019*4882a593Smuzhiyun * exact address from the effective address
1020*4882a593Smuzhiyun */
1021*4882a593Smuzhiyun phys_addr = evt->u.ue_error.physical_address +
1022*4882a593Smuzhiyun (evt->u.ue_error.effective_address & ~PAGE_MASK);
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun if (!evt->u.ue_error.physical_address_provided ||
1025*4882a593Smuzhiyun !is_zone_device_page(pfn_to_page(phys_addr >> PAGE_SHIFT)))
1026*4882a593Smuzhiyun return NOTIFY_DONE;
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun /* mce notifier is called from a process context, so mutex is safe */
1029*4882a593Smuzhiyun mutex_lock(&papr_ndr_lock);
1030*4882a593Smuzhiyun list_for_each_entry(p, &papr_nd_regions, region_list) {
1031*4882a593Smuzhiyun if (phys_addr >= p->res.start && phys_addr <= p->res.end) {
1032*4882a593Smuzhiyun found = true;
1033*4882a593Smuzhiyun break;
1034*4882a593Smuzhiyun }
1035*4882a593Smuzhiyun }
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun if (found)
1038*4882a593Smuzhiyun papr_scm_add_badblock(p->region, p->bus, phys_addr);
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun mutex_unlock(&papr_ndr_lock);
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun return found ? NOTIFY_OK : NOTIFY_DONE;
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun static struct notifier_block mce_ue_nb = {
1046*4882a593Smuzhiyun .notifier_call = handle_mce_ue
1047*4882a593Smuzhiyun };
1048*4882a593Smuzhiyun
papr_scm_probe(struct platform_device * pdev)1049*4882a593Smuzhiyun static int papr_scm_probe(struct platform_device *pdev)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun struct device_node *dn = pdev->dev.of_node;
1052*4882a593Smuzhiyun u32 drc_index, metadata_size;
1053*4882a593Smuzhiyun u64 blocks, block_size;
1054*4882a593Smuzhiyun struct papr_scm_priv *p;
1055*4882a593Smuzhiyun u8 uuid_raw[UUID_SIZE];
1056*4882a593Smuzhiyun const char *uuid_str;
1057*4882a593Smuzhiyun ssize_t stat_size;
1058*4882a593Smuzhiyun uuid_t uuid;
1059*4882a593Smuzhiyun int rc;
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun /* check we have all the required DT properties */
1062*4882a593Smuzhiyun if (of_property_read_u32(dn, "ibm,my-drc-index", &drc_index)) {
1063*4882a593Smuzhiyun dev_err(&pdev->dev, "%pOF: missing drc-index!\n", dn);
1064*4882a593Smuzhiyun return -ENODEV;
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun if (of_property_read_u64(dn, "ibm,block-size", &block_size)) {
1068*4882a593Smuzhiyun dev_err(&pdev->dev, "%pOF: missing block-size!\n", dn);
1069*4882a593Smuzhiyun return -ENODEV;
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun if (of_property_read_u64(dn, "ibm,number-of-blocks", &blocks)) {
1073*4882a593Smuzhiyun dev_err(&pdev->dev, "%pOF: missing number-of-blocks!\n", dn);
1074*4882a593Smuzhiyun return -ENODEV;
1075*4882a593Smuzhiyun }
1076*4882a593Smuzhiyun
1077*4882a593Smuzhiyun if (of_property_read_string(dn, "ibm,unit-guid", &uuid_str)) {
1078*4882a593Smuzhiyun dev_err(&pdev->dev, "%pOF: missing unit-guid!\n", dn);
1079*4882a593Smuzhiyun return -ENODEV;
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun p = kzalloc(sizeof(*p), GFP_KERNEL);
1084*4882a593Smuzhiyun if (!p)
1085*4882a593Smuzhiyun return -ENOMEM;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun /* Initialize the dimm mutex */
1088*4882a593Smuzhiyun mutex_init(&p->health_mutex);
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun /* optional DT properties */
1091*4882a593Smuzhiyun of_property_read_u32(dn, "ibm,metadata-size", &metadata_size);
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun p->dn = dn;
1094*4882a593Smuzhiyun p->drc_index = drc_index;
1095*4882a593Smuzhiyun p->block_size = block_size;
1096*4882a593Smuzhiyun p->blocks = blocks;
1097*4882a593Smuzhiyun p->is_volatile = !of_property_read_bool(dn, "ibm,cache-flush-required");
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun /* We just need to ensure that set cookies are unique across */
1100*4882a593Smuzhiyun uuid_parse(uuid_str, &uuid);
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun /*
1103*4882a593Smuzhiyun * The cookie1 and cookie2 are not really little endian.
1104*4882a593Smuzhiyun * We store a raw buffer representation of the
1105*4882a593Smuzhiyun * uuid string so that we can compare this with the label
1106*4882a593Smuzhiyun * area cookie irrespective of the endian configuration
1107*4882a593Smuzhiyun * with which the kernel is built.
1108*4882a593Smuzhiyun *
1109*4882a593Smuzhiyun * Historically we stored the cookie in the below format.
1110*4882a593Smuzhiyun * for a uuid string 72511b67-0b3b-42fd-8d1d-5be3cae8bcaa
1111*4882a593Smuzhiyun * cookie1 was 0xfd423b0b671b5172
1112*4882a593Smuzhiyun * cookie2 was 0xaabce8cae35b1d8d
1113*4882a593Smuzhiyun */
1114*4882a593Smuzhiyun export_uuid(uuid_raw, &uuid);
1115*4882a593Smuzhiyun p->nd_set.cookie1 = get_unaligned_le64(&uuid_raw[0]);
1116*4882a593Smuzhiyun p->nd_set.cookie2 = get_unaligned_le64(&uuid_raw[8]);
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun /* might be zero */
1119*4882a593Smuzhiyun p->metadata_size = metadata_size;
1120*4882a593Smuzhiyun p->pdev = pdev;
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun /* request the hypervisor to bind this region to somewhere in memory */
1123*4882a593Smuzhiyun rc = drc_pmem_bind(p);
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun /* If phyp says drc memory still bound then force unbound and retry */
1126*4882a593Smuzhiyun if (rc == H_OVERLAP)
1127*4882a593Smuzhiyun rc = drc_pmem_query_n_bind(p);
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun if (rc != H_SUCCESS) {
1130*4882a593Smuzhiyun dev_err(&p->pdev->dev, "bind err: %d\n", rc);
1131*4882a593Smuzhiyun rc = -ENXIO;
1132*4882a593Smuzhiyun goto err;
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun /* setup the resource for the newly bound range */
1136*4882a593Smuzhiyun p->res.start = p->bound_addr;
1137*4882a593Smuzhiyun p->res.end = p->bound_addr + p->blocks * p->block_size - 1;
1138*4882a593Smuzhiyun p->res.name = pdev->name;
1139*4882a593Smuzhiyun p->res.flags = IORESOURCE_MEM;
1140*4882a593Smuzhiyun
1141*4882a593Smuzhiyun /* Try retrieving the stat buffer and see if its supported */
1142*4882a593Smuzhiyun stat_size = drc_pmem_query_stats(p, NULL, 0);
1143*4882a593Smuzhiyun if (stat_size > 0) {
1144*4882a593Smuzhiyun p->stat_buffer_len = stat_size;
1145*4882a593Smuzhiyun dev_dbg(&p->pdev->dev, "Max perf-stat size %lu-bytes\n",
1146*4882a593Smuzhiyun p->stat_buffer_len);
1147*4882a593Smuzhiyun }
1148*4882a593Smuzhiyun
1149*4882a593Smuzhiyun rc = papr_scm_nvdimm_init(p);
1150*4882a593Smuzhiyun if (rc)
1151*4882a593Smuzhiyun goto err2;
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun platform_set_drvdata(pdev, p);
1154*4882a593Smuzhiyun
1155*4882a593Smuzhiyun return 0;
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun err2: drc_pmem_unbind(p);
1158*4882a593Smuzhiyun err: kfree(p);
1159*4882a593Smuzhiyun return rc;
1160*4882a593Smuzhiyun }
1161*4882a593Smuzhiyun
papr_scm_remove(struct platform_device * pdev)1162*4882a593Smuzhiyun static int papr_scm_remove(struct platform_device *pdev)
1163*4882a593Smuzhiyun {
1164*4882a593Smuzhiyun struct papr_scm_priv *p = platform_get_drvdata(pdev);
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun mutex_lock(&papr_ndr_lock);
1167*4882a593Smuzhiyun list_del(&p->region_list);
1168*4882a593Smuzhiyun mutex_unlock(&papr_ndr_lock);
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun nvdimm_bus_unregister(p->bus);
1171*4882a593Smuzhiyun drc_pmem_unbind(p);
1172*4882a593Smuzhiyun kfree(p->bus_desc.provider_name);
1173*4882a593Smuzhiyun kfree(p);
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun return 0;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun static const struct of_device_id papr_scm_match[] = {
1179*4882a593Smuzhiyun { .compatible = "ibm,pmemory" },
1180*4882a593Smuzhiyun { .compatible = "ibm,pmemory-v2" },
1181*4882a593Smuzhiyun { },
1182*4882a593Smuzhiyun };
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun static struct platform_driver papr_scm_driver = {
1185*4882a593Smuzhiyun .probe = papr_scm_probe,
1186*4882a593Smuzhiyun .remove = papr_scm_remove,
1187*4882a593Smuzhiyun .driver = {
1188*4882a593Smuzhiyun .name = "papr_scm",
1189*4882a593Smuzhiyun .of_match_table = papr_scm_match,
1190*4882a593Smuzhiyun },
1191*4882a593Smuzhiyun };
1192*4882a593Smuzhiyun
papr_scm_init(void)1193*4882a593Smuzhiyun static int __init papr_scm_init(void)
1194*4882a593Smuzhiyun {
1195*4882a593Smuzhiyun int ret;
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun ret = platform_driver_register(&papr_scm_driver);
1198*4882a593Smuzhiyun if (!ret)
1199*4882a593Smuzhiyun mce_register_notifier(&mce_ue_nb);
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun return ret;
1202*4882a593Smuzhiyun }
1203*4882a593Smuzhiyun module_init(papr_scm_init);
1204*4882a593Smuzhiyun
papr_scm_exit(void)1205*4882a593Smuzhiyun static void __exit papr_scm_exit(void)
1206*4882a593Smuzhiyun {
1207*4882a593Smuzhiyun mce_unregister_notifier(&mce_ue_nb);
1208*4882a593Smuzhiyun platform_driver_unregister(&papr_scm_driver);
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun module_exit(papr_scm_exit);
1211*4882a593Smuzhiyun
1212*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, papr_scm_match);
1213*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1214*4882a593Smuzhiyun MODULE_AUTHOR("IBM Corporation");
1215