1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Firmware-Assisted Dump support on POWER platform (OPAL).
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2019, Hari Bathini, IBM Corporation.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef _POWERNV_OPAL_FADUMP_H
9*4882a593Smuzhiyun #define _POWERNV_OPAL_FADUMP_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <asm/reg.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun /*
14*4882a593Smuzhiyun * With kernel & initrd loaded at 512MB (with 256MB size), enforce a minimum
15*4882a593Smuzhiyun * boot memory size of 768MB to ensure f/w loading kernel and initrd doesn't
16*4882a593Smuzhiyun * mess with crash'ed kernel's memory during MPIPL.
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun #define OPAL_FADUMP_MIN_BOOT_MEM (0x30000000UL)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun * OPAL FADump metadata structure format version
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * OPAL FADump kernel metadata structure stores kernel metadata needed to
24*4882a593Smuzhiyun * register-for/process crash dump. Format version is used to keep a tab on
25*4882a593Smuzhiyun * the changes in the structure format. The changes, if any, to the format
26*4882a593Smuzhiyun * are expected to be minimal and backward compatible.
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun #define OPAL_FADUMP_VERSION 0x1
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /*
31*4882a593Smuzhiyun * OPAL FADump kernel metadata
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun * The address of this structure will be registered with f/w for retrieving
34*4882a593Smuzhiyun * in the capture kernel to process the crash dump.
35*4882a593Smuzhiyun */
36*4882a593Smuzhiyun struct opal_fadump_mem_struct {
37*4882a593Smuzhiyun u8 version;
38*4882a593Smuzhiyun u8 reserved[3];
39*4882a593Smuzhiyun __be16 region_cnt; /* number of regions */
40*4882a593Smuzhiyun __be16 registered_regions; /* Regions registered for MPIPL */
41*4882a593Smuzhiyun __be64 fadumphdr_addr;
42*4882a593Smuzhiyun struct opal_mpipl_region rgn[FADUMP_MAX_MEM_REGS];
43*4882a593Smuzhiyun } __packed;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /*
46*4882a593Smuzhiyun * CPU state data
47*4882a593Smuzhiyun *
48*4882a593Smuzhiyun * CPU state data information is provided by f/w. The format for this data
49*4882a593Smuzhiyun * is defined in the HDAT spec. Version is used to keep a tab on the changes
50*4882a593Smuzhiyun * in this CPU state data format. Changes to this format are unlikely, but
51*4882a593Smuzhiyun * if there are any changes, please refer to latest HDAT specification.
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun #define HDAT_FADUMP_CPU_DATA_VER 1
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define HDAT_FADUMP_CORE_INACTIVE (0x0F)
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* HDAT thread header for register entries */
58*4882a593Smuzhiyun struct hdat_fadump_thread_hdr {
59*4882a593Smuzhiyun __be32 pir;
60*4882a593Smuzhiyun /* 0x00 - 0x0F - The corresponding stop state of the core */
61*4882a593Smuzhiyun u8 core_state;
62*4882a593Smuzhiyun u8 reserved[3];
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun __be32 offset; /* Offset to Register Entries array */
65*4882a593Smuzhiyun __be32 ecnt; /* Number of entries */
66*4882a593Smuzhiyun __be32 esize; /* Alloc size of each array entry in bytes */
67*4882a593Smuzhiyun __be32 eactsz; /* Actual size of each array entry in bytes */
68*4882a593Smuzhiyun } __packed;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* Register types populated by f/w */
71*4882a593Smuzhiyun #define HDAT_FADUMP_REG_TYPE_GPR 0x01
72*4882a593Smuzhiyun #define HDAT_FADUMP_REG_TYPE_SPR 0x02
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* ID numbers used by f/w while populating certain registers */
75*4882a593Smuzhiyun #define HDAT_FADUMP_REG_ID_NIP 0x7D0
76*4882a593Smuzhiyun #define HDAT_FADUMP_REG_ID_MSR 0x7D1
77*4882a593Smuzhiyun #define HDAT_FADUMP_REG_ID_CCR 0x7D2
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* HDAT register entry. */
80*4882a593Smuzhiyun struct hdat_fadump_reg_entry {
81*4882a593Smuzhiyun __be32 reg_type;
82*4882a593Smuzhiyun __be32 reg_num;
83*4882a593Smuzhiyun __be64 reg_val;
84*4882a593Smuzhiyun } __packed;
85*4882a593Smuzhiyun
opal_fadump_set_regval_regnum(struct pt_regs * regs,u32 reg_type,u32 reg_num,u64 reg_val)86*4882a593Smuzhiyun static inline void opal_fadump_set_regval_regnum(struct pt_regs *regs,
87*4882a593Smuzhiyun u32 reg_type, u32 reg_num,
88*4882a593Smuzhiyun u64 reg_val)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun if (reg_type == HDAT_FADUMP_REG_TYPE_GPR) {
91*4882a593Smuzhiyun if (reg_num < 32)
92*4882a593Smuzhiyun regs->gpr[reg_num] = reg_val;
93*4882a593Smuzhiyun return;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun switch (reg_num) {
97*4882a593Smuzhiyun case SPRN_CTR:
98*4882a593Smuzhiyun regs->ctr = reg_val;
99*4882a593Smuzhiyun break;
100*4882a593Smuzhiyun case SPRN_LR:
101*4882a593Smuzhiyun regs->link = reg_val;
102*4882a593Smuzhiyun break;
103*4882a593Smuzhiyun case SPRN_XER:
104*4882a593Smuzhiyun regs->xer = reg_val;
105*4882a593Smuzhiyun break;
106*4882a593Smuzhiyun case SPRN_DAR:
107*4882a593Smuzhiyun regs->dar = reg_val;
108*4882a593Smuzhiyun break;
109*4882a593Smuzhiyun case SPRN_DSISR:
110*4882a593Smuzhiyun regs->dsisr = reg_val;
111*4882a593Smuzhiyun break;
112*4882a593Smuzhiyun case HDAT_FADUMP_REG_ID_NIP:
113*4882a593Smuzhiyun regs->nip = reg_val;
114*4882a593Smuzhiyun break;
115*4882a593Smuzhiyun case HDAT_FADUMP_REG_ID_MSR:
116*4882a593Smuzhiyun regs->msr = reg_val;
117*4882a593Smuzhiyun break;
118*4882a593Smuzhiyun case HDAT_FADUMP_REG_ID_CCR:
119*4882a593Smuzhiyun regs->ccr = reg_val;
120*4882a593Smuzhiyun break;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
opal_fadump_read_regs(char * bufp,unsigned int regs_cnt,unsigned int reg_entry_size,bool cpu_endian,struct pt_regs * regs)124*4882a593Smuzhiyun static inline void opal_fadump_read_regs(char *bufp, unsigned int regs_cnt,
125*4882a593Smuzhiyun unsigned int reg_entry_size,
126*4882a593Smuzhiyun bool cpu_endian,
127*4882a593Smuzhiyun struct pt_regs *regs)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun struct hdat_fadump_reg_entry *reg_entry;
130*4882a593Smuzhiyun u64 val;
131*4882a593Smuzhiyun int i;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun memset(regs, 0, sizeof(struct pt_regs));
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun for (i = 0; i < regs_cnt; i++, bufp += reg_entry_size) {
136*4882a593Smuzhiyun reg_entry = (struct hdat_fadump_reg_entry *)bufp;
137*4882a593Smuzhiyun val = (cpu_endian ? be64_to_cpu(reg_entry->reg_val) :
138*4882a593Smuzhiyun (u64)(reg_entry->reg_val));
139*4882a593Smuzhiyun opal_fadump_set_regval_regnum(regs,
140*4882a593Smuzhiyun be32_to_cpu(reg_entry->reg_type),
141*4882a593Smuzhiyun be32_to_cpu(reg_entry->reg_num),
142*4882a593Smuzhiyun val);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun #endif /* _POWERNV_OPAL_FADUMP_H */
147