xref: /OK3568_Linux_fs/kernel/arch/powerpc/platforms/embedded6xx/storcenter.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Board setup routines for the storcenter
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright 2007 (C) Oyvind Repvik (nail@nslu2-linux.org)
5*4882a593Smuzhiyun  * Copyright 2007 Andy Wilcox, Jon Loeliger
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on linkstation.c by G. Liakhovetski
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This file is licensed under the terms of the GNU General Public License
10*4882a593Smuzhiyun  * version 2.  This program is licensed "as is" without any warranty of
11*4882a593Smuzhiyun  * any kind, whether express or implied.
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/pci.h>
16*4882a593Smuzhiyun #include <linux/initrd.h>
17*4882a593Smuzhiyun #include <linux/of_platform.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <asm/time.h>
20*4882a593Smuzhiyun #include <asm/prom.h>
21*4882a593Smuzhiyun #include <asm/mpic.h>
22*4882a593Smuzhiyun #include <asm/pci-bridge.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include "mpc10x.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static const struct of_device_id storcenter_of_bus[] __initconst = {
28*4882a593Smuzhiyun 	{ .name = "soc", },
29*4882a593Smuzhiyun 	{},
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
storcenter_device_probe(void)32*4882a593Smuzhiyun static int __init storcenter_device_probe(void)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	of_platform_bus_probe(NULL, storcenter_of_bus, NULL);
35*4882a593Smuzhiyun 	return 0;
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun machine_device_initcall(storcenter, storcenter_device_probe);
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 
storcenter_add_bridge(struct device_node * dev)40*4882a593Smuzhiyun static int __init storcenter_add_bridge(struct device_node *dev)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun #ifdef CONFIG_PCI
43*4882a593Smuzhiyun 	int len;
44*4882a593Smuzhiyun 	struct pci_controller *hose;
45*4882a593Smuzhiyun 	const int *bus_range;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	printk("Adding PCI host bridge %pOF\n", dev);
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	hose = pcibios_alloc_controller(dev);
50*4882a593Smuzhiyun 	if (hose == NULL)
51*4882a593Smuzhiyun 		return -ENOMEM;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	bus_range = of_get_property(dev, "bus-range", &len);
54*4882a593Smuzhiyun 	hose->first_busno = bus_range ? bus_range[0] : 0;
55*4882a593Smuzhiyun 	hose->last_busno = bus_range ? bus_range[1] : 0xff;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	setup_indirect_pci(hose, MPC10X_MAPB_CNFG_ADDR, MPC10X_MAPB_CNFG_DATA, 0);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	/* Interpret the "ranges" property */
60*4882a593Smuzhiyun 	/* This also maps the I/O region and sets isa_io/mem_base */
61*4882a593Smuzhiyun 	pci_process_bridge_OF_ranges(hose, dev, 1);
62*4882a593Smuzhiyun #endif
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	return 0;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
storcenter_setup_arch(void)67*4882a593Smuzhiyun static void __init storcenter_setup_arch(void)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	struct device_node *np;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	/* Lookup PCI host bridges */
72*4882a593Smuzhiyun 	for_each_compatible_node(np, "pci", "mpc10x-pci")
73*4882a593Smuzhiyun 		storcenter_add_bridge(np);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	printk(KERN_INFO "IOMEGA StorCenter\n");
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /*
79*4882a593Smuzhiyun  * Interrupt setup and service.  Interrupts on the turbostation come
80*4882a593Smuzhiyun  * from the four PCI slots plus onboard 8241 devices: I2C, DUART.
81*4882a593Smuzhiyun  */
storcenter_init_IRQ(void)82*4882a593Smuzhiyun static void __init storcenter_init_IRQ(void)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	struct mpic *mpic;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	mpic = mpic_alloc(NULL, 0, 0, 16, 0, " OpenPIC  ");
87*4882a593Smuzhiyun 	BUG_ON(mpic == NULL);
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	/*
90*4882a593Smuzhiyun 	 * 16 Serial Interrupts followed by 16 Internal Interrupts.
91*4882a593Smuzhiyun 	 * I2C is the second internal, so it is at 17, 0x11020.
92*4882a593Smuzhiyun 	 */
93*4882a593Smuzhiyun 	mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);
94*4882a593Smuzhiyun 	mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	mpic_init(mpic);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
storcenter_restart(char * cmd)99*4882a593Smuzhiyun static void __noreturn storcenter_restart(char *cmd)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	local_irq_disable();
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	/* Set exception prefix high - to the firmware */
104*4882a593Smuzhiyun 	mtmsr(mfmsr() | MSR_IP);
105*4882a593Smuzhiyun 	isync();
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	/* Wait for reset to happen */
108*4882a593Smuzhiyun 	for (;;) ;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun 
storcenter_probe(void)111*4882a593Smuzhiyun static int __init storcenter_probe(void)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun 	return of_machine_is_compatible("iomega,storcenter");
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
define_machine(storcenter)116*4882a593Smuzhiyun define_machine(storcenter){
117*4882a593Smuzhiyun 	.name 			= "IOMEGA StorCenter",
118*4882a593Smuzhiyun 	.probe 			= storcenter_probe,
119*4882a593Smuzhiyun 	.setup_arch 		= storcenter_setup_arch,
120*4882a593Smuzhiyun 	.init_IRQ 		= storcenter_init_IRQ,
121*4882a593Smuzhiyun 	.get_irq 		= mpic_get_irq,
122*4882a593Smuzhiyun 	.restart 		= storcenter_restart,
123*4882a593Smuzhiyun 	.calibrate_decr 	= generic_calibrate_decr,
124*4882a593Smuzhiyun };
125