1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyunmenu "Platform support" 3*4882a593Smuzhiyun 4*4882a593Smuzhiyunsource "arch/powerpc/platforms/powernv/Kconfig" 5*4882a593Smuzhiyunsource "arch/powerpc/platforms/pseries/Kconfig" 6*4882a593Smuzhiyunsource "arch/powerpc/platforms/chrp/Kconfig" 7*4882a593Smuzhiyunsource "arch/powerpc/platforms/512x/Kconfig" 8*4882a593Smuzhiyunsource "arch/powerpc/platforms/52xx/Kconfig" 9*4882a593Smuzhiyunsource "arch/powerpc/platforms/powermac/Kconfig" 10*4882a593Smuzhiyunsource "arch/powerpc/platforms/maple/Kconfig" 11*4882a593Smuzhiyunsource "arch/powerpc/platforms/pasemi/Kconfig" 12*4882a593Smuzhiyunsource "arch/powerpc/platforms/ps3/Kconfig" 13*4882a593Smuzhiyunsource "arch/powerpc/platforms/cell/Kconfig" 14*4882a593Smuzhiyunsource "arch/powerpc/platforms/8xx/Kconfig" 15*4882a593Smuzhiyunsource "arch/powerpc/platforms/82xx/Kconfig" 16*4882a593Smuzhiyunsource "arch/powerpc/platforms/83xx/Kconfig" 17*4882a593Smuzhiyunsource "arch/powerpc/platforms/85xx/Kconfig" 18*4882a593Smuzhiyunsource "arch/powerpc/platforms/86xx/Kconfig" 19*4882a593Smuzhiyunsource "arch/powerpc/platforms/embedded6xx/Kconfig" 20*4882a593Smuzhiyunsource "arch/powerpc/platforms/44x/Kconfig" 21*4882a593Smuzhiyunsource "arch/powerpc/platforms/40x/Kconfig" 22*4882a593Smuzhiyunsource "arch/powerpc/platforms/amigaone/Kconfig" 23*4882a593Smuzhiyun 24*4882a593Smuzhiyunconfig KVM_GUEST 25*4882a593Smuzhiyun bool "KVM Guest support" 26*4882a593Smuzhiyun select EPAPR_PARAVIRT 27*4882a593Smuzhiyun help 28*4882a593Smuzhiyun This option enables various optimizations for running under the KVM 29*4882a593Smuzhiyun hypervisor. Overhead for the kernel when not running inside KVM should 30*4882a593Smuzhiyun be minimal. 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun In case of doubt, say Y 33*4882a593Smuzhiyun 34*4882a593Smuzhiyunconfig EPAPR_PARAVIRT 35*4882a593Smuzhiyun bool "ePAPR para-virtualization support" 36*4882a593Smuzhiyun help 37*4882a593Smuzhiyun Enables ePAPR para-virtualization support for guests. 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun In case of doubt, say Y 40*4882a593Smuzhiyun 41*4882a593Smuzhiyunconfig PPC_NATIVE 42*4882a593Smuzhiyun bool 43*4882a593Smuzhiyun depends on PPC_BOOK3S_32 || PPC64 44*4882a593Smuzhiyun help 45*4882a593Smuzhiyun Support for running natively on the hardware, i.e. without 46*4882a593Smuzhiyun a hypervisor. This option is not user-selectable but should 47*4882a593Smuzhiyun be selected by all platforms that need it. 48*4882a593Smuzhiyun 49*4882a593Smuzhiyunconfig PPC_OF_BOOT_TRAMPOLINE 50*4882a593Smuzhiyun bool "Support booting from Open Firmware or yaboot" 51*4882a593Smuzhiyun depends on PPC_BOOK3S_32 || PPC64 52*4882a593Smuzhiyun default y 53*4882a593Smuzhiyun help 54*4882a593Smuzhiyun Support from booting from Open Firmware or yaboot using an 55*4882a593Smuzhiyun Open Firmware client interface. This enables the kernel to 56*4882a593Smuzhiyun communicate with open firmware to retrieve system information 57*4882a593Smuzhiyun such as the device tree. 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun In case of doubt, say Y 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunconfig PPC_DT_CPU_FTRS 62*4882a593Smuzhiyun bool "Device-tree based CPU feature discovery & setup" 63*4882a593Smuzhiyun depends on PPC_BOOK3S_64 64*4882a593Smuzhiyun default y 65*4882a593Smuzhiyun help 66*4882a593Smuzhiyun This enables code to use a new device tree binding for describing CPU 67*4882a593Smuzhiyun compatibility and features. Saying Y here will attempt to use the new 68*4882a593Smuzhiyun binding if the firmware provides it. Currently only the skiboot 69*4882a593Smuzhiyun firmware provides this binding. 70*4882a593Smuzhiyun If you're not sure say Y. 71*4882a593Smuzhiyun 72*4882a593Smuzhiyunconfig UDBG_RTAS_CONSOLE 73*4882a593Smuzhiyun bool "RTAS based debug console" 74*4882a593Smuzhiyun depends on PPC_RTAS 75*4882a593Smuzhiyun 76*4882a593Smuzhiyunconfig PPC_SMP_MUXED_IPI 77*4882a593Smuzhiyun bool 78*4882a593Smuzhiyun help 79*4882a593Smuzhiyun Select this option if your platform supports SMP and your 80*4882a593Smuzhiyun interrupt controller provides less than 4 interrupts to each 81*4882a593Smuzhiyun cpu. This will enable the generic code to multiplex the 4 82*4882a593Smuzhiyun messages on to one ipi. 83*4882a593Smuzhiyun 84*4882a593Smuzhiyunconfig IPIC 85*4882a593Smuzhiyun bool 86*4882a593Smuzhiyun 87*4882a593Smuzhiyunconfig MPIC 88*4882a593Smuzhiyun bool 89*4882a593Smuzhiyun 90*4882a593Smuzhiyunconfig MPIC_TIMER 91*4882a593Smuzhiyun bool "MPIC Global Timer" 92*4882a593Smuzhiyun depends on MPIC && FSL_SOC 93*4882a593Smuzhiyun help 94*4882a593Smuzhiyun The MPIC global timer is a hardware timer inside the 95*4882a593Smuzhiyun Freescale PIC complying with OpenPIC standard. When the 96*4882a593Smuzhiyun specified interval times out, the hardware timer generates 97*4882a593Smuzhiyun an interrupt. The driver currently is only tested on fsl 98*4882a593Smuzhiyun chip, but it can potentially support other global timers 99*4882a593Smuzhiyun complying with the OpenPIC standard. 100*4882a593Smuzhiyun 101*4882a593Smuzhiyunconfig FSL_MPIC_TIMER_WAKEUP 102*4882a593Smuzhiyun tristate "Freescale MPIC global timer wakeup driver" 103*4882a593Smuzhiyun depends on FSL_SOC && MPIC_TIMER && PM 104*4882a593Smuzhiyun help 105*4882a593Smuzhiyun The driver provides a way to wake up the system by MPIC 106*4882a593Smuzhiyun timer. 107*4882a593Smuzhiyun e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 108*4882a593Smuzhiyun 109*4882a593Smuzhiyunconfig PPC_EPAPR_HV_PIC 110*4882a593Smuzhiyun bool 111*4882a593Smuzhiyun select EPAPR_PARAVIRT 112*4882a593Smuzhiyun 113*4882a593Smuzhiyunconfig MPIC_WEIRD 114*4882a593Smuzhiyun bool 115*4882a593Smuzhiyun 116*4882a593Smuzhiyunconfig MPIC_MSGR 117*4882a593Smuzhiyun bool "MPIC message register support" 118*4882a593Smuzhiyun depends on MPIC 119*4882a593Smuzhiyun help 120*4882a593Smuzhiyun Enables support for the MPIC message registers. These 121*4882a593Smuzhiyun registers are used for inter-processor communication. 122*4882a593Smuzhiyun 123*4882a593Smuzhiyunconfig PPC_I8259 124*4882a593Smuzhiyun bool 125*4882a593Smuzhiyun 126*4882a593Smuzhiyunconfig U3_DART 127*4882a593Smuzhiyun bool 128*4882a593Smuzhiyun depends on PPC64 129*4882a593Smuzhiyun 130*4882a593Smuzhiyunconfig PPC_RTAS 131*4882a593Smuzhiyun bool 132*4882a593Smuzhiyun 133*4882a593Smuzhiyunconfig RTAS_ERROR_LOGGING 134*4882a593Smuzhiyun bool 135*4882a593Smuzhiyun depends on PPC_RTAS 136*4882a593Smuzhiyun 137*4882a593Smuzhiyunconfig PPC_RTAS_DAEMON 138*4882a593Smuzhiyun bool 139*4882a593Smuzhiyun depends on PPC_RTAS 140*4882a593Smuzhiyun 141*4882a593Smuzhiyunconfig RTAS_PROC 142*4882a593Smuzhiyun bool "Proc interface to RTAS" 143*4882a593Smuzhiyun depends on PPC_RTAS && PROC_FS 144*4882a593Smuzhiyun default y 145*4882a593Smuzhiyun 146*4882a593Smuzhiyunconfig RTAS_FLASH 147*4882a593Smuzhiyun tristate "Firmware flash interface" 148*4882a593Smuzhiyun depends on PPC64 && RTAS_PROC 149*4882a593Smuzhiyun 150*4882a593Smuzhiyunconfig MMIO_NVRAM 151*4882a593Smuzhiyun bool 152*4882a593Smuzhiyun 153*4882a593Smuzhiyunconfig MPIC_U3_HT_IRQS 154*4882a593Smuzhiyun bool 155*4882a593Smuzhiyun 156*4882a593Smuzhiyunconfig MPIC_BROKEN_REGREAD 157*4882a593Smuzhiyun bool 158*4882a593Smuzhiyun depends on MPIC 159*4882a593Smuzhiyun help 160*4882a593Smuzhiyun This option enables a MPIC driver workaround for some chips 161*4882a593Smuzhiyun that have a bug that causes some interrupt source information 162*4882a593Smuzhiyun to not read back properly. It is safe to use on other chips as 163*4882a593Smuzhiyun well, but enabling it uses about 8KB of memory to keep copies 164*4882a593Smuzhiyun of the register contents in software. 165*4882a593Smuzhiyun 166*4882a593Smuzhiyunconfig EEH 167*4882a593Smuzhiyun bool 168*4882a593Smuzhiyun depends on (PPC_POWERNV || PPC_PSERIES) && PCI 169*4882a593Smuzhiyun default y 170*4882a593Smuzhiyun 171*4882a593Smuzhiyunconfig PPC_MPC106 172*4882a593Smuzhiyun bool 173*4882a593Smuzhiyun 174*4882a593Smuzhiyunconfig PPC_970_NAP 175*4882a593Smuzhiyun bool 176*4882a593Smuzhiyun 177*4882a593Smuzhiyunconfig PPC_P7_NAP 178*4882a593Smuzhiyun bool 179*4882a593Smuzhiyun 180*4882a593Smuzhiyunconfig PPC_BOOK3S_IDLE 181*4882a593Smuzhiyun def_bool y 182*4882a593Smuzhiyun depends on (PPC_970_NAP || PPC_P7_NAP) 183*4882a593Smuzhiyun 184*4882a593Smuzhiyunconfig PPC_INDIRECT_PIO 185*4882a593Smuzhiyun bool 186*4882a593Smuzhiyun select GENERIC_IOMAP 187*4882a593Smuzhiyun 188*4882a593Smuzhiyunconfig PPC_INDIRECT_MMIO 189*4882a593Smuzhiyun bool 190*4882a593Smuzhiyun 191*4882a593Smuzhiyunconfig PPC_IO_WORKAROUNDS 192*4882a593Smuzhiyun bool 193*4882a593Smuzhiyun 194*4882a593Smuzhiyunsource "drivers/cpufreq/Kconfig" 195*4882a593Smuzhiyun 196*4882a593Smuzhiyunmenu "CPUIdle driver" 197*4882a593Smuzhiyun 198*4882a593Smuzhiyunsource "drivers/cpuidle/Kconfig" 199*4882a593Smuzhiyun 200*4882a593Smuzhiyunendmenu 201*4882a593Smuzhiyun 202*4882a593Smuzhiyunconfig TAU 203*4882a593Smuzhiyun bool "On-chip CPU temperature sensor support" 204*4882a593Smuzhiyun depends on PPC_BOOK3S_32 205*4882a593Smuzhiyun help 206*4882a593Smuzhiyun G3 and G4 processors have an on-chip temperature sensor called the 207*4882a593Smuzhiyun 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 208*4882a593Smuzhiyun temperature within 2-4 degrees Celsius. This option shows the current 209*4882a593Smuzhiyun on-die temperature in /proc/cpuinfo if the cpu supports it. 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun Unfortunately, this sensor is very inaccurate when uncalibrated, so 212*4882a593Smuzhiyun don't assume the cpu temp is actually what /proc/cpuinfo says it is. 213*4882a593Smuzhiyun 214*4882a593Smuzhiyunconfig TAU_INT 215*4882a593Smuzhiyun bool "Interrupt driven TAU driver (EXPERIMENTAL)" 216*4882a593Smuzhiyun depends on TAU 217*4882a593Smuzhiyun help 218*4882a593Smuzhiyun The TAU supports an interrupt driven mode which causes an interrupt 219*4882a593Smuzhiyun whenever the temperature goes out of range. This is the fastest way 220*4882a593Smuzhiyun to get notified the temp has exceeded a range. With this option off, 221*4882a593Smuzhiyun a timer is used to re-check the temperature periodically. 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun If in doubt, say N here. 224*4882a593Smuzhiyun 225*4882a593Smuzhiyunconfig TAU_AVERAGE 226*4882a593Smuzhiyun bool "Average high and low temp" 227*4882a593Smuzhiyun depends on TAU 228*4882a593Smuzhiyun help 229*4882a593Smuzhiyun The TAU hardware can compare the temperature to an upper and lower 230*4882a593Smuzhiyun bound. The default behavior is to show both the upper and lower 231*4882a593Smuzhiyun bound in /proc/cpuinfo. If the range is large, the temperature is 232*4882a593Smuzhiyun either changing a lot, or the TAU hardware is broken (likely on some 233*4882a593Smuzhiyun G4's). If the range is small (around 4 degrees), the temperature is 234*4882a593Smuzhiyun relatively stable. If you say Y here, a single temperature value, 235*4882a593Smuzhiyun halfway between the upper and lower bounds, will be reported in 236*4882a593Smuzhiyun /proc/cpuinfo. 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun If in doubt, say N here. 239*4882a593Smuzhiyun 240*4882a593Smuzhiyunconfig QE_GPIO 241*4882a593Smuzhiyun bool "QE GPIO support" 242*4882a593Smuzhiyun depends on QUICC_ENGINE 243*4882a593Smuzhiyun select GPIOLIB 244*4882a593Smuzhiyun help 245*4882a593Smuzhiyun Say Y here if you're going to use hardware that connects to the 246*4882a593Smuzhiyun QE GPIOs. 247*4882a593Smuzhiyun 248*4882a593Smuzhiyunconfig CPM2 249*4882a593Smuzhiyun bool "Enable support for the CPM2 (Communications Processor Module)" 250*4882a593Smuzhiyun depends on (FSL_SOC_BOOKE && PPC32) || 8260 251*4882a593Smuzhiyun select CPM 252*4882a593Smuzhiyun select HAVE_PCI 253*4882a593Smuzhiyun select GPIOLIB 254*4882a593Smuzhiyun help 255*4882a593Smuzhiyun The CPM2 (Communications Processor Module) is a coprocessor on 256*4882a593Smuzhiyun embedded CPUs made by Freescale. Selecting this option means that 257*4882a593Smuzhiyun you wish to build a kernel for a machine with a CPM2 coprocessor 258*4882a593Smuzhiyun on it (826x, 827x, 8560). 259*4882a593Smuzhiyun 260*4882a593Smuzhiyunconfig FSL_ULI1575 261*4882a593Smuzhiyun bool 262*4882a593Smuzhiyun select GENERIC_ISA_DMA 263*4882a593Smuzhiyun help 264*4882a593Smuzhiyun Supports for the ULI1575 PCIe south bridge that exists on some 265*4882a593Smuzhiyun Freescale reference boards. The boards all use the ULI in pretty 266*4882a593Smuzhiyun much the same way. 267*4882a593Smuzhiyun 268*4882a593Smuzhiyunconfig CPM 269*4882a593Smuzhiyun bool 270*4882a593Smuzhiyun select GENERIC_ALLOCATOR 271*4882a593Smuzhiyun 272*4882a593Smuzhiyunconfig OF_RTC 273*4882a593Smuzhiyun bool 274*4882a593Smuzhiyun help 275*4882a593Smuzhiyun Uses information from the OF or flattened device tree to instantiate 276*4882a593Smuzhiyun platform devices for direct mapped RTC chips like the DS1742 or DS1743. 277*4882a593Smuzhiyun 278*4882a593Smuzhiyunconfig GEN_RTC 279*4882a593Smuzhiyun bool "Use the platform RTC operations from user space" 280*4882a593Smuzhiyun select RTC_CLASS 281*4882a593Smuzhiyun select RTC_DRV_GENERIC 282*4882a593Smuzhiyun help 283*4882a593Smuzhiyun This option provides backwards compatibility with the old gen_rtc.ko 284*4882a593Smuzhiyun module that was traditionally used for old PowerPC machines. 285*4882a593Smuzhiyun Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 286*4882a593Smuzhiyun replacing their get_rtc_time/set_rtc_time callbacks with 287*4882a593Smuzhiyun a proper RTC device driver. 288*4882a593Smuzhiyun 289*4882a593Smuzhiyunconfig MCU_MPC8349EMITX 290*4882a593Smuzhiyun bool "MPC8349E-mITX MCU driver" 291*4882a593Smuzhiyun depends on I2C=y && PPC_83xx 292*4882a593Smuzhiyun select GPIOLIB 293*4882a593Smuzhiyun help 294*4882a593Smuzhiyun Say Y here to enable soft power-off functionality on the Freescale 295*4882a593Smuzhiyun boards with the MPC8349E-mITX-compatible MCU chips. This driver will 296*4882a593Smuzhiyun also register MCU GPIOs with the generic GPIO API, so you'll able 297*4882a593Smuzhiyun to use MCU pins as GPIOs. 298*4882a593Smuzhiyun 299*4882a593Smuzhiyunendmenu 300