1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Platform setup for the Embedded Planet EP88xC board
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Author: Scott Wood <scottwood@freescale.com>
5*4882a593Smuzhiyun * Copyright 2007 Freescale Semiconductor, Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License
8*4882a593Smuzhiyun * version 2. This program is licensed "as is" without any warranty of any
9*4882a593Smuzhiyun * kind, whether express or implied.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/of_address.h>
14*4882a593Smuzhiyun #include <linux/of_fdt.h>
15*4882a593Smuzhiyun #include <linux/of_platform.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <asm/machdep.h>
18*4882a593Smuzhiyun #include <asm/io.h>
19*4882a593Smuzhiyun #include <asm/udbg.h>
20*4882a593Smuzhiyun #include <asm/cpm1.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include "mpc8xx.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun struct cpm_pin {
25*4882a593Smuzhiyun int port, pin, flags;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static struct cpm_pin ep88xc_pins[] = {
29*4882a593Smuzhiyun /* SMC1 */
30*4882a593Smuzhiyun {1, 24, CPM_PIN_INPUT}, /* RX */
31*4882a593Smuzhiyun {1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* SCC2 */
34*4882a593Smuzhiyun {0, 12, CPM_PIN_INPUT}, /* TX */
35*4882a593Smuzhiyun {0, 13, CPM_PIN_INPUT}, /* RX */
36*4882a593Smuzhiyun {2, 8, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CD */
37*4882a593Smuzhiyun {2, 9, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CTS */
38*4882a593Smuzhiyun {2, 14, CPM_PIN_INPUT}, /* RTS */
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* MII1 */
41*4882a593Smuzhiyun {0, 0, CPM_PIN_INPUT},
42*4882a593Smuzhiyun {0, 1, CPM_PIN_INPUT},
43*4882a593Smuzhiyun {0, 2, CPM_PIN_INPUT},
44*4882a593Smuzhiyun {0, 3, CPM_PIN_INPUT},
45*4882a593Smuzhiyun {0, 4, CPM_PIN_OUTPUT},
46*4882a593Smuzhiyun {0, 10, CPM_PIN_OUTPUT},
47*4882a593Smuzhiyun {0, 11, CPM_PIN_OUTPUT},
48*4882a593Smuzhiyun {1, 19, CPM_PIN_INPUT},
49*4882a593Smuzhiyun {1, 31, CPM_PIN_INPUT},
50*4882a593Smuzhiyun {2, 12, CPM_PIN_INPUT},
51*4882a593Smuzhiyun {2, 13, CPM_PIN_INPUT},
52*4882a593Smuzhiyun {3, 8, CPM_PIN_INPUT},
53*4882a593Smuzhiyun {4, 30, CPM_PIN_OUTPUT},
54*4882a593Smuzhiyun {4, 31, CPM_PIN_OUTPUT},
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* MII2 */
57*4882a593Smuzhiyun {4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
58*4882a593Smuzhiyun {4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
59*4882a593Smuzhiyun {4, 16, CPM_PIN_OUTPUT},
60*4882a593Smuzhiyun {4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
61*4882a593Smuzhiyun {4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
62*4882a593Smuzhiyun {4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
63*4882a593Smuzhiyun {4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
64*4882a593Smuzhiyun {4, 21, CPM_PIN_OUTPUT},
65*4882a593Smuzhiyun {4, 22, CPM_PIN_OUTPUT},
66*4882a593Smuzhiyun {4, 23, CPM_PIN_OUTPUT},
67*4882a593Smuzhiyun {4, 24, CPM_PIN_OUTPUT},
68*4882a593Smuzhiyun {4, 25, CPM_PIN_OUTPUT},
69*4882a593Smuzhiyun {4, 26, CPM_PIN_OUTPUT},
70*4882a593Smuzhiyun {4, 27, CPM_PIN_OUTPUT},
71*4882a593Smuzhiyun {4, 28, CPM_PIN_OUTPUT},
72*4882a593Smuzhiyun {4, 29, CPM_PIN_OUTPUT},
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* USB */
75*4882a593Smuzhiyun {0, 6, CPM_PIN_INPUT}, /* CLK2 */
76*4882a593Smuzhiyun {0, 14, CPM_PIN_INPUT}, /* USBOE */
77*4882a593Smuzhiyun {0, 15, CPM_PIN_INPUT}, /* USBRXD */
78*4882a593Smuzhiyun {2, 6, CPM_PIN_OUTPUT}, /* USBTXN */
79*4882a593Smuzhiyun {2, 7, CPM_PIN_OUTPUT}, /* USBTXP */
80*4882a593Smuzhiyun {2, 10, CPM_PIN_INPUT}, /* USBRXN */
81*4882a593Smuzhiyun {2, 11, CPM_PIN_INPUT}, /* USBRXP */
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* Misc */
84*4882a593Smuzhiyun {1, 26, CPM_PIN_INPUT}, /* BRGO2 */
85*4882a593Smuzhiyun {1, 27, CPM_PIN_INPUT}, /* BRGO1 */
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
init_ioports(void)88*4882a593Smuzhiyun static void __init init_ioports(void)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun int i;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(ep88xc_pins); i++) {
93*4882a593Smuzhiyun struct cpm_pin *pin = &ep88xc_pins[i];
94*4882a593Smuzhiyun cpm1_set_pin(pin->port, pin->pin, pin->flags);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
98*4882a593Smuzhiyun cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_TX); /* USB */
99*4882a593Smuzhiyun cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
100*4882a593Smuzhiyun cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
101*4882a593Smuzhiyun cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun static u8 __iomem *ep88xc_bcsr;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun #define BCSR7_SCC2_ENABLE 0x10
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun #define BCSR8_PHY1_ENABLE 0x80
109*4882a593Smuzhiyun #define BCSR8_PHY1_POWER 0x40
110*4882a593Smuzhiyun #define BCSR8_PHY2_ENABLE 0x20
111*4882a593Smuzhiyun #define BCSR8_PHY2_POWER 0x10
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun #define BCSR9_USB_ENABLE 0x80
114*4882a593Smuzhiyun #define BCSR9_USB_POWER 0x40
115*4882a593Smuzhiyun #define BCSR9_USB_HOST 0x20
116*4882a593Smuzhiyun #define BCSR9_USB_FULL_SPEED_TARGET 0x10
117*4882a593Smuzhiyun
ep88xc_setup_arch(void)118*4882a593Smuzhiyun static void __init ep88xc_setup_arch(void)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun struct device_node *np;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun cpm_reset();
123*4882a593Smuzhiyun init_ioports();
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun np = of_find_compatible_node(NULL, NULL, "fsl,ep88xc-bcsr");
126*4882a593Smuzhiyun if (!np) {
127*4882a593Smuzhiyun printk(KERN_CRIT "Could not find fsl,ep88xc-bcsr node\n");
128*4882a593Smuzhiyun return;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun ep88xc_bcsr = of_iomap(np, 0);
132*4882a593Smuzhiyun of_node_put(np);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun if (!ep88xc_bcsr) {
135*4882a593Smuzhiyun printk(KERN_CRIT "Could not remap BCSR\n");
136*4882a593Smuzhiyun return;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE);
140*4882a593Smuzhiyun setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
141*4882a593Smuzhiyun BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
ep88xc_probe(void)144*4882a593Smuzhiyun static int __init ep88xc_probe(void)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun return of_machine_is_compatible("fsl,ep88xc");
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun static const struct of_device_id of_bus_ids[] __initconst = {
150*4882a593Smuzhiyun { .name = "soc", },
151*4882a593Smuzhiyun { .name = "cpm", },
152*4882a593Smuzhiyun { .name = "localbus", },
153*4882a593Smuzhiyun {},
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun
declare_of_platform_devices(void)156*4882a593Smuzhiyun static int __init declare_of_platform_devices(void)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun /* Publish the QE devices */
159*4882a593Smuzhiyun of_platform_bus_probe(NULL, of_bus_ids, NULL);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun return 0;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun machine_device_initcall(ep88xc, declare_of_platform_devices);
164*4882a593Smuzhiyun
define_machine(ep88xc)165*4882a593Smuzhiyun define_machine(ep88xc) {
166*4882a593Smuzhiyun .name = "Embedded Planet EP88xC",
167*4882a593Smuzhiyun .probe = ep88xc_probe,
168*4882a593Smuzhiyun .setup_arch = ep88xc_setup_arch,
169*4882a593Smuzhiyun .init_IRQ = mpc8xx_pics_init,
170*4882a593Smuzhiyun .get_irq = mpc8xx_get_irq,
171*4882a593Smuzhiyun .restart = mpc8xx_restart,
172*4882a593Smuzhiyun .calibrate_decr = mpc8xx_calibrate_decr,
173*4882a593Smuzhiyun .progress = udbg_progress,
174*4882a593Smuzhiyun };
175