1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2008 Freescale Semiconductor, Inc.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/stddef.h>
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/interrupt.h>
9*4882a593Smuzhiyun #include <linux/of_irq.h>
10*4882a593Smuzhiyun #include <linux/of_platform.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <asm/mpic.h>
13*4882a593Smuzhiyun #include <asm/i8259.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #ifdef CONFIG_PPC_I8259
mpc86xx_8259_cascade(struct irq_desc * desc)16*4882a593Smuzhiyun static void mpc86xx_8259_cascade(struct irq_desc *desc)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun struct irq_chip *chip = irq_desc_get_chip(desc);
19*4882a593Smuzhiyun unsigned int cascade_irq = i8259_irq();
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun if (cascade_irq)
22*4882a593Smuzhiyun generic_handle_irq(cascade_irq);
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun chip->irq_eoi(&desc->irq_data);
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun #endif /* CONFIG_PPC_I8259 */
27*4882a593Smuzhiyun
mpc86xx_init_irq(void)28*4882a593Smuzhiyun void __init mpc86xx_init_irq(void)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun #ifdef CONFIG_PPC_I8259
31*4882a593Smuzhiyun struct device_node *np;
32*4882a593Smuzhiyun struct device_node *cascade_node = NULL;
33*4882a593Smuzhiyun int cascade_irq;
34*4882a593Smuzhiyun #endif
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
37*4882a593Smuzhiyun MPIC_SINGLE_DEST_CPU,
38*4882a593Smuzhiyun 0, 256, " MPIC ");
39*4882a593Smuzhiyun BUG_ON(mpic == NULL);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun mpic_init(mpic);
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #ifdef CONFIG_PPC_I8259
44*4882a593Smuzhiyun /* Initialize i8259 controller */
45*4882a593Smuzhiyun for_each_node_by_type(np, "interrupt-controller")
46*4882a593Smuzhiyun if (of_device_is_compatible(np, "chrp,iic")) {
47*4882a593Smuzhiyun cascade_node = np;
48*4882a593Smuzhiyun break;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun if (cascade_node == NULL) {
52*4882a593Smuzhiyun printk(KERN_DEBUG "Could not find i8259 PIC\n");
53*4882a593Smuzhiyun return;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun cascade_irq = irq_of_parse_and_map(cascade_node, 0);
57*4882a593Smuzhiyun if (!cascade_irq) {
58*4882a593Smuzhiyun printk(KERN_ERR "Failed to map cascade interrupt\n");
59*4882a593Smuzhiyun return;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun i8259_init(cascade_node, 0);
63*4882a593Smuzhiyun of_node_put(cascade_node);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun irq_set_chained_handler(cascade_irq, mpc86xx_8259_cascade);
66*4882a593Smuzhiyun #endif
67*4882a593Smuzhiyun }
68