xref: /OK3568_Linux_fs/kernel/arch/powerpc/platforms/86xx/mvme7100.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Board setup routines for the Emerson/Artesyn MVME7100
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Alessio Igor Bogani <alessio.bogani@elettra.eu>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Based on earlier code by:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  *	Ajit Prem <ajit.prem@emerson.com>
12*4882a593Smuzhiyun  *	Copyright 2008 Emerson
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * USB host fixup is borrowed by:
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  *	Martyn Welch <martyn.welch@ge.com>
17*4882a593Smuzhiyun  *	Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/pci.h>
21*4882a593Smuzhiyun #include <linux/of.h>
22*4882a593Smuzhiyun #include <linux/of_platform.h>
23*4882a593Smuzhiyun #include <linux/of_address.h>
24*4882a593Smuzhiyun #include <asm/udbg.h>
25*4882a593Smuzhiyun #include <asm/mpic.h>
26*4882a593Smuzhiyun #include <sysdev/fsl_soc.h>
27*4882a593Smuzhiyun #include <sysdev/fsl_pci.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include "mpc86xx.h"
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define MVME7100_INTERRUPT_REG_2_OFFSET	0x05
32*4882a593Smuzhiyun #define MVME7100_DS1375_MASK		0x40
33*4882a593Smuzhiyun #define MVME7100_MAX6649_MASK		0x20
34*4882a593Smuzhiyun #define MVME7100_ABORT_MASK		0x10
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun  * Setup the architecture
38*4882a593Smuzhiyun  */
mvme7100_setup_arch(void)39*4882a593Smuzhiyun static void __init mvme7100_setup_arch(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	struct device_node *bcsr_node;
42*4882a593Smuzhiyun 	void __iomem *mvme7100_regs = NULL;
43*4882a593Smuzhiyun 	u8 reg;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	if (ppc_md.progress)
46*4882a593Smuzhiyun 		ppc_md.progress("mvme7100_setup_arch()", 0);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #ifdef CONFIG_SMP
49*4882a593Smuzhiyun 	mpc86xx_smp_init();
50*4882a593Smuzhiyun #endif
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	fsl_pci_assign_primary();
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	/* Remap BCSR registers */
55*4882a593Smuzhiyun 	bcsr_node = of_find_compatible_node(NULL, NULL,
56*4882a593Smuzhiyun 			"artesyn,mvme7100-bcsr");
57*4882a593Smuzhiyun 	if (bcsr_node) {
58*4882a593Smuzhiyun 		mvme7100_regs = of_iomap(bcsr_node, 0);
59*4882a593Smuzhiyun 		of_node_put(bcsr_node);
60*4882a593Smuzhiyun 	}
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	if (mvme7100_regs) {
63*4882a593Smuzhiyun 		/* Disable ds1375, max6649, and abort interrupts */
64*4882a593Smuzhiyun 		reg = readb(mvme7100_regs + MVME7100_INTERRUPT_REG_2_OFFSET);
65*4882a593Smuzhiyun 		reg |= MVME7100_DS1375_MASK | MVME7100_MAX6649_MASK
66*4882a593Smuzhiyun 			| MVME7100_ABORT_MASK;
67*4882a593Smuzhiyun 		writeb(reg, mvme7100_regs + MVME7100_INTERRUPT_REG_2_OFFSET);
68*4882a593Smuzhiyun 	} else
69*4882a593Smuzhiyun 		pr_warn("Unable to map board registers\n");
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	pr_info("MVME7100 board from Artesyn\n");
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /*
75*4882a593Smuzhiyun  * Called very early, device-tree isn't unflattened
76*4882a593Smuzhiyun  */
mvme7100_probe(void)77*4882a593Smuzhiyun static int __init mvme7100_probe(void)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	unsigned long root = of_get_flat_dt_root();
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	return of_flat_dt_is_compatible(root, "artesyn,MVME7100");
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
mvme7100_usb_host_fixup(struct pci_dev * pdev)84*4882a593Smuzhiyun static void mvme7100_usb_host_fixup(struct pci_dev *pdev)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	unsigned int val;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	if (!machine_is(mvme7100))
89*4882a593Smuzhiyun 		return;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	/* Ensure only ports 1 & 2 are enabled */
92*4882a593Smuzhiyun 	pci_read_config_dword(pdev, 0xe0, &val);
93*4882a593Smuzhiyun 	pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	/* System clock is 48-MHz Oscillator and EHCI Enabled. */
96*4882a593Smuzhiyun 	pci_write_config_dword(pdev, 0xe4, 1 << 5);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
99*4882a593Smuzhiyun 	mvme7100_usb_host_fixup);
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun machine_arch_initcall(mvme7100, mpc86xx_common_publish_devices);
102*4882a593Smuzhiyun 
define_machine(mvme7100)103*4882a593Smuzhiyun define_machine(mvme7100) {
104*4882a593Smuzhiyun 	.name			= "MVME7100",
105*4882a593Smuzhiyun 	.probe			= mvme7100_probe,
106*4882a593Smuzhiyun 	.setup_arch		= mvme7100_setup_arch,
107*4882a593Smuzhiyun 	.init_IRQ		= mpc86xx_init_irq,
108*4882a593Smuzhiyun 	.get_irq		= mpic_get_irq,
109*4882a593Smuzhiyun 	.time_init		= mpc86xx_time_init,
110*4882a593Smuzhiyun 	.calibrate_decr		= generic_calibrate_decr,
111*4882a593Smuzhiyun 	.progress		= udbg_progress,
112*4882a593Smuzhiyun #ifdef CONFIG_PCI
113*4882a593Smuzhiyun 	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun };
116