1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Based on MPC8560 ADS and arch/ppc stx_gp3 ports
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright 2008 Freescale Semiconductor Inc.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Dan Malek <dan@embeddededge.com>
10*4882a593Smuzhiyun * Copyright 2004 Embedded Edge, LLC
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Copied from mpc8560_ads.c
13*4882a593Smuzhiyun * Copyright 2002, 2003 Motorola Inc.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
16*4882a593Smuzhiyun * Copyright 2004-2005 MontaVista Software, Inc.
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <linux/stddef.h>
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/pci.h>
22*4882a593Smuzhiyun #include <linux/kdev_t.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <linux/seq_file.h>
25*4882a593Smuzhiyun #include <linux/of_platform.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include <asm/time.h>
28*4882a593Smuzhiyun #include <asm/machdep.h>
29*4882a593Smuzhiyun #include <asm/pci-bridge.h>
30*4882a593Smuzhiyun #include <asm/mpic.h>
31*4882a593Smuzhiyun #include <asm/prom.h>
32*4882a593Smuzhiyun #include <mm/mmu_decl.h>
33*4882a593Smuzhiyun #include <asm/udbg.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #include <sysdev/fsl_soc.h>
36*4882a593Smuzhiyun #include <sysdev/fsl_pci.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #include "mpc85xx.h"
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #ifdef CONFIG_CPM2
41*4882a593Smuzhiyun #include <asm/cpm2.h>
42*4882a593Smuzhiyun #endif /* CONFIG_CPM2 */
43*4882a593Smuzhiyun
stx_gp3_pic_init(void)44*4882a593Smuzhiyun static void __init stx_gp3_pic_init(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
47*4882a593Smuzhiyun 0, 256, " OpenPIC ");
48*4882a593Smuzhiyun BUG_ON(mpic == NULL);
49*4882a593Smuzhiyun mpic_init(mpic);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun mpc85xx_cpm2_pic_init();
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /*
55*4882a593Smuzhiyun * Setup the architecture
56*4882a593Smuzhiyun */
stx_gp3_setup_arch(void)57*4882a593Smuzhiyun static void __init stx_gp3_setup_arch(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun if (ppc_md.progress)
60*4882a593Smuzhiyun ppc_md.progress("stx_gp3_setup_arch()", 0);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun fsl_pci_assign_primary();
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #ifdef CONFIG_CPM2
65*4882a593Smuzhiyun cpm2_reset();
66*4882a593Smuzhiyun #endif
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
stx_gp3_show_cpuinfo(struct seq_file * m)69*4882a593Smuzhiyun static void stx_gp3_show_cpuinfo(struct seq_file *m)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun uint pvid, svid, phid1;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun pvid = mfspr(SPRN_PVR);
74*4882a593Smuzhiyun svid = mfspr(SPRN_SVR);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun seq_printf(m, "Vendor\t\t: RPC Electronics STx\n");
77*4882a593Smuzhiyun seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
78*4882a593Smuzhiyun seq_printf(m, "SVR\t\t: 0x%x\n", svid);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* Display cpu Pll setting */
81*4882a593Smuzhiyun phid1 = mfspr(SPRN_HID1);
82*4882a593Smuzhiyun seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun * Called very early, device-tree isn't unflattened
89*4882a593Smuzhiyun */
stx_gp3_probe(void)90*4882a593Smuzhiyun static int __init stx_gp3_probe(void)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun return of_machine_is_compatible("stx,gp3-8560");
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
define_machine(stx_gp3)95*4882a593Smuzhiyun define_machine(stx_gp3) {
96*4882a593Smuzhiyun .name = "STX GP3",
97*4882a593Smuzhiyun .probe = stx_gp3_probe,
98*4882a593Smuzhiyun .setup_arch = stx_gp3_setup_arch,
99*4882a593Smuzhiyun .init_IRQ = stx_gp3_pic_init,
100*4882a593Smuzhiyun .show_cpuinfo = stx_gp3_show_cpuinfo,
101*4882a593Smuzhiyun .get_irq = mpic_get_irq,
102*4882a593Smuzhiyun .calibrate_decr = generic_calibrate_decr,
103*4882a593Smuzhiyun .progress = udbg_progress,
104*4882a593Smuzhiyun };
105