1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Roy Zang <tie-fei.zang@freescale.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Description:
8*4882a593Smuzhiyun * P1023 RDB Board Setup
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/errno.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/fsl_devices.h>
18*4882a593Smuzhiyun #include <linux/of_platform.h>
19*4882a593Smuzhiyun #include <linux/of_device.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <asm/time.h>
22*4882a593Smuzhiyun #include <asm/machdep.h>
23*4882a593Smuzhiyun #include <asm/pci-bridge.h>
24*4882a593Smuzhiyun #include <mm/mmu_decl.h>
25*4882a593Smuzhiyun #include <asm/prom.h>
26*4882a593Smuzhiyun #include <asm/udbg.h>
27*4882a593Smuzhiyun #include <asm/mpic.h>
28*4882a593Smuzhiyun #include "smp.h"
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <sysdev/fsl_soc.h>
31*4882a593Smuzhiyun #include <sysdev/fsl_pci.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include "mpc85xx.h"
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* ************************************************************************
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun * Setup the architecture
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun */
mpc85xx_rdb_setup_arch(void)40*4882a593Smuzhiyun static void __init mpc85xx_rdb_setup_arch(void)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun struct device_node *np;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun if (ppc_md.progress)
45*4882a593Smuzhiyun ppc_md.progress("p1023_rdb_setup_arch()", 0);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* Map BCSR area */
48*4882a593Smuzhiyun np = of_find_node_by_name(NULL, "bcsr");
49*4882a593Smuzhiyun if (np != NULL) {
50*4882a593Smuzhiyun static u8 __iomem *bcsr_regs;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun bcsr_regs = of_iomap(np, 0);
53*4882a593Smuzhiyun of_node_put(np);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun if (!bcsr_regs) {
56*4882a593Smuzhiyun printk(KERN_ERR
57*4882a593Smuzhiyun "BCSR: Failed to map bcsr register space\n");
58*4882a593Smuzhiyun return;
59*4882a593Smuzhiyun } else {
60*4882a593Smuzhiyun #define BCSR15_I2C_BUS0_SEG_CLR 0x07
61*4882a593Smuzhiyun #define BCSR15_I2C_BUS0_SEG2 0x02
62*4882a593Smuzhiyun /*
63*4882a593Smuzhiyun * Note: Accessing exclusively i2c devices.
64*4882a593Smuzhiyun *
65*4882a593Smuzhiyun * The i2c controller selects initially ID EEPROM in the u-boot;
66*4882a593Smuzhiyun * but if menu configuration selects RTC support in the kernel,
67*4882a593Smuzhiyun * the i2c controller switches to select RTC chip in the kernel.
68*4882a593Smuzhiyun */
69*4882a593Smuzhiyun #ifdef CONFIG_RTC_CLASS
70*4882a593Smuzhiyun /* Enable RTC chip on the segment #2 of i2c */
71*4882a593Smuzhiyun clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
72*4882a593Smuzhiyun setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
73*4882a593Smuzhiyun #endif
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun iounmap(bcsr_regs);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun mpc85xx_smp_init();
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun fsl_pci_assign_primary();
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
85*4882a593Smuzhiyun
mpc85xx_rdb_pic_init(void)86*4882a593Smuzhiyun static void __init mpc85xx_rdb_pic_init(void)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
89*4882a593Smuzhiyun MPIC_SINGLE_DEST_CPU,
90*4882a593Smuzhiyun 0, 256, " OpenPIC ");
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun BUG_ON(mpic == NULL);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun mpic_init(mpic);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
p1023_rdb_probe(void)97*4882a593Smuzhiyun static int __init p1023_rdb_probe(void)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun return of_machine_is_compatible("fsl,P1023RDB");
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
define_machine(p1023_rdb)103*4882a593Smuzhiyun define_machine(p1023_rdb) {
104*4882a593Smuzhiyun .name = "P1023 RDB",
105*4882a593Smuzhiyun .probe = p1023_rdb_probe,
106*4882a593Smuzhiyun .setup_arch = mpc85xx_rdb_setup_arch,
107*4882a593Smuzhiyun .init_IRQ = mpc85xx_rdb_pic_init,
108*4882a593Smuzhiyun .get_irq = mpic_get_irq,
109*4882a593Smuzhiyun .calibrate_decr = generic_calibrate_decr,
110*4882a593Smuzhiyun .progress = udbg_progress,
111*4882a593Smuzhiyun #ifdef CONFIG_PCI
112*4882a593Smuzhiyun .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
113*4882a593Smuzhiyun .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun };
116