1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Routines common to most mpc85xx-based boards.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/of_irq.h>
7*4882a593Smuzhiyun #include <linux/of_platform.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <asm/fsl_pm.h>
10*4882a593Smuzhiyun #include <soc/fsl/qe/qe.h>
11*4882a593Smuzhiyun #include <sysdev/cpm2_pic.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include "mpc85xx.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun const struct fsl_pm_ops *qoriq_pm_ops;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun static const struct of_device_id mpc85xx_common_ids[] __initconst = {
18*4882a593Smuzhiyun { .type = "soc", },
19*4882a593Smuzhiyun { .compatible = "soc", },
20*4882a593Smuzhiyun { .compatible = "simple-bus", },
21*4882a593Smuzhiyun { .name = "cpm", },
22*4882a593Smuzhiyun { .name = "localbus", },
23*4882a593Smuzhiyun { .compatible = "gianfar", },
24*4882a593Smuzhiyun { .compatible = "fsl,qe", },
25*4882a593Smuzhiyun { .compatible = "fsl,cpm2", },
26*4882a593Smuzhiyun { .compatible = "fsl,srio", },
27*4882a593Smuzhiyun /* So that the DMA channel nodes can be probed individually: */
28*4882a593Smuzhiyun { .compatible = "fsl,eloplus-dma", },
29*4882a593Smuzhiyun /* For the PMC driver */
30*4882a593Smuzhiyun { .compatible = "fsl,mpc8548-guts", },
31*4882a593Smuzhiyun /* Probably unnecessary? */
32*4882a593Smuzhiyun { .compatible = "gpio-leds", },
33*4882a593Smuzhiyun /* For all PCI controllers */
34*4882a593Smuzhiyun { .compatible = "fsl,mpc8540-pci", },
35*4882a593Smuzhiyun { .compatible = "fsl,mpc8548-pcie", },
36*4882a593Smuzhiyun { .compatible = "fsl,p1022-pcie", },
37*4882a593Smuzhiyun { .compatible = "fsl,p1010-pcie", },
38*4882a593Smuzhiyun { .compatible = "fsl,p1023-pcie", },
39*4882a593Smuzhiyun { .compatible = "fsl,p4080-pcie", },
40*4882a593Smuzhiyun { .compatible = "fsl,qoriq-pcie-v2.4", },
41*4882a593Smuzhiyun { .compatible = "fsl,qoriq-pcie-v2.3", },
42*4882a593Smuzhiyun { .compatible = "fsl,qoriq-pcie-v2.2", },
43*4882a593Smuzhiyun { .compatible = "fsl,fman", },
44*4882a593Smuzhiyun {},
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun
mpc85xx_common_publish_devices(void)47*4882a593Smuzhiyun int __init mpc85xx_common_publish_devices(void)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun #ifdef CONFIG_CPM2
cpm2_cascade(struct irq_desc * desc)52*4882a593Smuzhiyun static void cpm2_cascade(struct irq_desc *desc)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct irq_chip *chip = irq_desc_get_chip(desc);
55*4882a593Smuzhiyun int cascade_irq;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun while ((cascade_irq = cpm2_get_irq()) >= 0)
58*4882a593Smuzhiyun generic_handle_irq(cascade_irq);
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun chip->irq_eoi(&desc->irq_data);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun
mpc85xx_cpm2_pic_init(void)64*4882a593Smuzhiyun void __init mpc85xx_cpm2_pic_init(void)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct device_node *np;
67*4882a593Smuzhiyun int irq;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /* Setup CPM2 PIC */
70*4882a593Smuzhiyun np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
71*4882a593Smuzhiyun if (np == NULL) {
72*4882a593Smuzhiyun printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
73*4882a593Smuzhiyun return;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun irq = irq_of_parse_and_map(np, 0);
76*4882a593Smuzhiyun if (!irq) {
77*4882a593Smuzhiyun of_node_put(np);
78*4882a593Smuzhiyun printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
79*4882a593Smuzhiyun return;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun cpm2_pic_init(np);
83*4882a593Smuzhiyun of_node_put(np);
84*4882a593Smuzhiyun irq_set_chained_handler(irq, cpm2_cascade);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun #endif
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun #ifdef CONFIG_QUICC_ENGINE
mpc85xx_qe_par_io_init(void)89*4882a593Smuzhiyun void __init mpc85xx_qe_par_io_init(void)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun struct device_node *np;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun np = of_find_node_by_name(NULL, "par_io");
94*4882a593Smuzhiyun if (np) {
95*4882a593Smuzhiyun struct device_node *ucc;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun par_io_init(np);
98*4882a593Smuzhiyun of_node_put(np);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun for_each_node_by_name(ucc, "ucc")
101*4882a593Smuzhiyun par_io_of_config(ucc);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun #endif
106