1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * BSC913xQDS Board Setup
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author:
6*4882a593Smuzhiyun * Harninder Rai <harninder.rai@freescale.com>
7*4882a593Smuzhiyun * Priyanka Jain <Priyanka.Jain@freescale.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Copyright 2014 Freescale Semiconductor Inc.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/of_platform.h>
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun #include <asm/mpic.h>
15*4882a593Smuzhiyun #include <sysdev/fsl_soc.h>
16*4882a593Smuzhiyun #include <sysdev/fsl_pci.h>
17*4882a593Smuzhiyun #include <asm/udbg.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "mpc85xx.h"
20*4882a593Smuzhiyun #include "smp.h"
21*4882a593Smuzhiyun
bsc913x_qds_pic_init(void)22*4882a593Smuzhiyun void __init bsc913x_qds_pic_init(void)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
25*4882a593Smuzhiyun MPIC_SINGLE_DEST_CPU,
26*4882a593Smuzhiyun 0, 256, " OpenPIC ");
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun if (!mpic)
29*4882a593Smuzhiyun pr_err("bsc913x: Failed to allocate MPIC structure\n");
30*4882a593Smuzhiyun else
31*4882a593Smuzhiyun mpic_init(mpic);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /*
35*4882a593Smuzhiyun * Setup the architecture
36*4882a593Smuzhiyun */
bsc913x_qds_setup_arch(void)37*4882a593Smuzhiyun static void __init bsc913x_qds_setup_arch(void)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun if (ppc_md.progress)
40*4882a593Smuzhiyun ppc_md.progress("bsc913x_qds_setup_arch()", 0);
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #if defined(CONFIG_SMP)
43*4882a593Smuzhiyun mpc85xx_smp_init();
44*4882a593Smuzhiyun #endif
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun fsl_pci_assign_primary();
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun pr_info("bsc913x board from Freescale Semiconductor\n");
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun machine_arch_initcall(bsc9132_qds, mpc85xx_common_publish_devices);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /*
54*4882a593Smuzhiyun * Called very early, device-tree isn't unflattened
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun
bsc9132_qds_probe(void)57*4882a593Smuzhiyun static int __init bsc9132_qds_probe(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun return of_machine_is_compatible("fsl,bsc9132qds");
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
define_machine(bsc9132_qds)62*4882a593Smuzhiyun define_machine(bsc9132_qds) {
63*4882a593Smuzhiyun .name = "BSC9132 QDS",
64*4882a593Smuzhiyun .probe = bsc9132_qds_probe,
65*4882a593Smuzhiyun .setup_arch = bsc913x_qds_setup_arch,
66*4882a593Smuzhiyun .init_IRQ = bsc913x_qds_pic_init,
67*4882a593Smuzhiyun #ifdef CONFIG_PCI
68*4882a593Smuzhiyun .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
69*4882a593Smuzhiyun #endif
70*4882a593Smuzhiyun .get_irq = mpic_get_irq,
71*4882a593Smuzhiyun .calibrate_decr = generic_calibrate_decr,
72*4882a593Smuzhiyun .progress = udbg_progress,
73*4882a593Smuzhiyun };
74