1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Description:
6*4882a593Smuzhiyun * MPC832xE MDS board specific routines.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/stddef.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/errno.h>
13*4882a593Smuzhiyun #include <linux/reboot.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun #include <linux/kdev_t.h>
16*4882a593Smuzhiyun #include <linux/major.h>
17*4882a593Smuzhiyun #include <linux/console.h>
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/seq_file.h>
20*4882a593Smuzhiyun #include <linux/root_dev.h>
21*4882a593Smuzhiyun #include <linux/initrd.h>
22*4882a593Smuzhiyun #include <linux/of_platform.h>
23*4882a593Smuzhiyun #include <linux/of_device.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <linux/atomic.h>
26*4882a593Smuzhiyun #include <asm/time.h>
27*4882a593Smuzhiyun #include <asm/io.h>
28*4882a593Smuzhiyun #include <asm/machdep.h>
29*4882a593Smuzhiyun #include <asm/ipic.h>
30*4882a593Smuzhiyun #include <asm/irq.h>
31*4882a593Smuzhiyun #include <asm/prom.h>
32*4882a593Smuzhiyun #include <asm/udbg.h>
33*4882a593Smuzhiyun #include <sysdev/fsl_soc.h>
34*4882a593Smuzhiyun #include <sysdev/fsl_pci.h>
35*4882a593Smuzhiyun #include <soc/fsl/qe/qe.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include "mpc83xx.h"
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #undef DEBUG
40*4882a593Smuzhiyun #ifdef DEBUG
41*4882a593Smuzhiyun #define DBG(fmt...) udbg_printf(fmt)
42*4882a593Smuzhiyun #else
43*4882a593Smuzhiyun #define DBG(fmt...)
44*4882a593Smuzhiyun #endif
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* ************************************************************************
47*4882a593Smuzhiyun *
48*4882a593Smuzhiyun * Setup the architecture
49*4882a593Smuzhiyun *
50*4882a593Smuzhiyun */
mpc832x_sys_setup_arch(void)51*4882a593Smuzhiyun static void __init mpc832x_sys_setup_arch(void)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun struct device_node *np;
54*4882a593Smuzhiyun u8 __iomem *bcsr_regs = NULL;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun mpc83xx_setup_arch();
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* Map BCSR area */
59*4882a593Smuzhiyun np = of_find_node_by_name(NULL, "bcsr");
60*4882a593Smuzhiyun if (np) {
61*4882a593Smuzhiyun struct resource res;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun of_address_to_resource(np, 0, &res);
64*4882a593Smuzhiyun bcsr_regs = ioremap(res.start, resource_size(&res));
65*4882a593Smuzhiyun of_node_put(np);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #ifdef CONFIG_QUICC_ENGINE
69*4882a593Smuzhiyun if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
70*4882a593Smuzhiyun par_io_init(np);
71*4882a593Smuzhiyun of_node_put(np);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun for_each_node_by_name(np, "ucc")
74*4882a593Smuzhiyun par_io_of_config(np);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
78*4882a593Smuzhiyun != NULL){
79*4882a593Smuzhiyun /* Reset the Ethernet PHYs */
80*4882a593Smuzhiyun #define BCSR8_FETH_RST 0x50
81*4882a593Smuzhiyun clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
82*4882a593Smuzhiyun udelay(1000);
83*4882a593Smuzhiyun setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
84*4882a593Smuzhiyun iounmap(bcsr_regs);
85*4882a593Smuzhiyun of_node_put(np);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun #endif /* CONFIG_QUICC_ENGINE */
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /*
93*4882a593Smuzhiyun * Called very early, MMU is off, device-tree isn't unflattened
94*4882a593Smuzhiyun */
mpc832x_sys_probe(void)95*4882a593Smuzhiyun static int __init mpc832x_sys_probe(void)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun return of_machine_is_compatible("MPC832xMDS");
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
define_machine(mpc832x_mds)100*4882a593Smuzhiyun define_machine(mpc832x_mds) {
101*4882a593Smuzhiyun .name = "MPC832x MDS",
102*4882a593Smuzhiyun .probe = mpc832x_sys_probe,
103*4882a593Smuzhiyun .setup_arch = mpc832x_sys_setup_arch,
104*4882a593Smuzhiyun .init_IRQ = mpc83xx_ipic_init_IRQ,
105*4882a593Smuzhiyun .get_irq = ipic_get_irq,
106*4882a593Smuzhiyun .restart = mpc83xx_restart,
107*4882a593Smuzhiyun .time_init = mpc83xx_time_init,
108*4882a593Smuzhiyun .calibrate_decr = generic_calibrate_decr,
109*4882a593Smuzhiyun .progress = udbg_progress,
110*4882a593Smuzhiyun };
111