1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Freescale Lite5200 board support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Written by: Grant Likely <grant.likely@secretlab.ca>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) Secret Lab Technologies Ltd. 2006. All rights reserved.
8*4882a593Smuzhiyun * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Description:
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #undef DEBUG
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/pci.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/of_address.h>
19*4882a593Smuzhiyun #include <linux/root_dev.h>
20*4882a593Smuzhiyun #include <linux/initrd.h>
21*4882a593Smuzhiyun #include <asm/time.h>
22*4882a593Smuzhiyun #include <asm/io.h>
23*4882a593Smuzhiyun #include <asm/machdep.h>
24*4882a593Smuzhiyun #include <asm/prom.h>
25*4882a593Smuzhiyun #include <asm/mpc52xx.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* ************************************************************************
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * Setup the architecture
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* mpc5200 device tree match tables */
34*4882a593Smuzhiyun static const struct of_device_id mpc5200_cdm_ids[] __initconst = {
35*4882a593Smuzhiyun { .compatible = "fsl,mpc5200-cdm", },
36*4882a593Smuzhiyun { .compatible = "mpc5200-cdm", },
37*4882a593Smuzhiyun {}
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static const struct of_device_id mpc5200_gpio_ids[] __initconst = {
41*4882a593Smuzhiyun { .compatible = "fsl,mpc5200-gpio", },
42*4882a593Smuzhiyun { .compatible = "mpc5200-gpio", },
43*4882a593Smuzhiyun {}
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /*
47*4882a593Smuzhiyun * Fix clock configuration.
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * Firmware is supposed to be responsible for this. If you are creating a
50*4882a593Smuzhiyun * new board port, do *NOT* duplicate this code. Fix your boot firmware
51*4882a593Smuzhiyun * to set it correctly in the first place
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun static void __init
lite5200_fix_clock_config(void)54*4882a593Smuzhiyun lite5200_fix_clock_config(void)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun struct device_node *np;
57*4882a593Smuzhiyun struct mpc52xx_cdm __iomem *cdm;
58*4882a593Smuzhiyun /* Map zones */
59*4882a593Smuzhiyun np = of_find_matching_node(NULL, mpc5200_cdm_ids);
60*4882a593Smuzhiyun cdm = of_iomap(np, 0);
61*4882a593Smuzhiyun of_node_put(np);
62*4882a593Smuzhiyun if (!cdm) {
63*4882a593Smuzhiyun printk(KERN_ERR "%s() failed; expect abnormal behaviour\n",
64*4882a593Smuzhiyun __func__);
65*4882a593Smuzhiyun return;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* Use internal 48 Mhz */
69*4882a593Smuzhiyun out_8(&cdm->ext_48mhz_en, 0x00);
70*4882a593Smuzhiyun out_8(&cdm->fd_enable, 0x01);
71*4882a593Smuzhiyun if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */
72*4882a593Smuzhiyun out_be16(&cdm->fd_counters, 0x0001);
73*4882a593Smuzhiyun else
74*4882a593Smuzhiyun out_be16(&cdm->fd_counters, 0x5555);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* Unmap the regs */
77*4882a593Smuzhiyun iounmap(cdm);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /*
81*4882a593Smuzhiyun * Fix setting of port_config register.
82*4882a593Smuzhiyun *
83*4882a593Smuzhiyun * Firmware is supposed to be responsible for this. If you are creating a
84*4882a593Smuzhiyun * new board port, do *NOT* duplicate this code. Fix your boot firmware
85*4882a593Smuzhiyun * to set it correctly in the first place
86*4882a593Smuzhiyun */
87*4882a593Smuzhiyun static void __init
lite5200_fix_port_config(void)88*4882a593Smuzhiyun lite5200_fix_port_config(void)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun struct device_node *np;
91*4882a593Smuzhiyun struct mpc52xx_gpio __iomem *gpio;
92*4882a593Smuzhiyun u32 port_config;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun np = of_find_matching_node(NULL, mpc5200_gpio_ids);
95*4882a593Smuzhiyun gpio = of_iomap(np, 0);
96*4882a593Smuzhiyun of_node_put(np);
97*4882a593Smuzhiyun if (!gpio) {
98*4882a593Smuzhiyun printk(KERN_ERR "%s() failed. expect abnormal behavior\n",
99*4882a593Smuzhiyun __func__);
100*4882a593Smuzhiyun return;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* Set port config */
104*4882a593Smuzhiyun port_config = in_be32(&gpio->port_config);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun port_config &= ~0x00800000; /* 48Mhz internal, pin is GPIO */
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun port_config &= ~0x00007000; /* USB port : Differential mode */
109*4882a593Smuzhiyun port_config |= 0x00001000; /* USB 1 only */
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun port_config &= ~0x03000000; /* ATA CS is on csb_4/5 */
112*4882a593Smuzhiyun port_config |= 0x01000000;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun pr_debug("port_config: old:%x new:%x\n",
115*4882a593Smuzhiyun in_be32(&gpio->port_config), port_config);
116*4882a593Smuzhiyun out_be32(&gpio->port_config, port_config);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* Unmap zone */
119*4882a593Smuzhiyun iounmap(gpio);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun #ifdef CONFIG_PM
lite5200_suspend_prepare(void __iomem * mbar)123*4882a593Smuzhiyun static void lite5200_suspend_prepare(void __iomem *mbar)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun u8 pin = 1; /* GPIO_WKUP_1 (GPIO_PSC2_4) */
126*4882a593Smuzhiyun u8 level = 0; /* wakeup on low level */
127*4882a593Smuzhiyun mpc52xx_set_wakeup_gpio(pin, level);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun * power down usb port
131*4882a593Smuzhiyun * this needs to be called before of-ohci suspend code
132*4882a593Smuzhiyun */
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* set ports to "power switched" and "powered at the same time"
135*4882a593Smuzhiyun * USB Rh descriptor A: NPS = 0, PSM = 0 */
136*4882a593Smuzhiyun out_be32(mbar + 0x1048, in_be32(mbar + 0x1048) & ~0x300);
137*4882a593Smuzhiyun /* USB Rh status: LPS = 1 - turn off power */
138*4882a593Smuzhiyun out_be32(mbar + 0x1050, 0x00000001);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
lite5200_resume_finish(void __iomem * mbar)141*4882a593Smuzhiyun static void lite5200_resume_finish(void __iomem *mbar)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun /* USB Rh status: LPSC = 1 - turn on power */
144*4882a593Smuzhiyun out_be32(mbar + 0x1050, 0x00010000);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun #endif
147*4882a593Smuzhiyun
lite5200_setup_arch(void)148*4882a593Smuzhiyun static void __init lite5200_setup_arch(void)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun if (ppc_md.progress)
151*4882a593Smuzhiyun ppc_md.progress("lite5200_setup_arch()", 0);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /* Map important registers from the internal memory map */
154*4882a593Smuzhiyun mpc52xx_map_common_devices();
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* Some mpc5200 & mpc5200b related configuration */
157*4882a593Smuzhiyun mpc5200_setup_xlb_arbiter();
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /* Fix things that firmware should have done. */
160*4882a593Smuzhiyun lite5200_fix_clock_config();
161*4882a593Smuzhiyun lite5200_fix_port_config();
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun #ifdef CONFIG_PM
164*4882a593Smuzhiyun mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare;
165*4882a593Smuzhiyun mpc52xx_suspend.board_resume_finish = lite5200_resume_finish;
166*4882a593Smuzhiyun lite5200_pm_init();
167*4882a593Smuzhiyun #endif
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun mpc52xx_setup_pci();
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun static const char * const board[] __initconst = {
173*4882a593Smuzhiyun "fsl,lite5200",
174*4882a593Smuzhiyun "fsl,lite5200b",
175*4882a593Smuzhiyun NULL,
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /*
179*4882a593Smuzhiyun * Called very early, MMU is off, device-tree isn't unflattened
180*4882a593Smuzhiyun */
lite5200_probe(void)181*4882a593Smuzhiyun static int __init lite5200_probe(void)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun return of_device_compatible_match(of_root, board);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
define_machine(lite5200)186*4882a593Smuzhiyun define_machine(lite5200) {
187*4882a593Smuzhiyun .name = "lite5200",
188*4882a593Smuzhiyun .probe = lite5200_probe,
189*4882a593Smuzhiyun .setup_arch = lite5200_setup_arch,
190*4882a593Smuzhiyun .init = mpc52xx_declare_of_platform_devices,
191*4882a593Smuzhiyun .init_IRQ = mpc52xx_init_irq,
192*4882a593Smuzhiyun .get_irq = mpc52xx_get_irq,
193*4882a593Smuzhiyun .restart = mpc52xx_restart,
194*4882a593Smuzhiyun .calibrate_decr = generic_calibrate_decr,
195*4882a593Smuzhiyun };
196